Re: [PATCH v2 5/8] clk: rockchip: fix usbphy-related clocks

From: Doug Anderson
Date: Mon Nov 09 2015 - 16:01:16 EST


On Sun, Nov 8, 2015 at 8:04 AM, Heiko Stuebner <heiko@xxxxxxxxx> wrote:
> The otgphy clocks really only drive the phy blocks. These in turn
> contain plls that then generate the 480m clocks the clock controller
> uses to supply some other clocks like uart0, gpu or the video-codec.
> So fix this structure to actually respect that hirarchy and removed
> that usb480m fixed-rate clock working as a placeholder till now, as
> this wouldn't even work if the supplying phy gets turned off while
> its pll-output gets used elsewhere.
> Signed-off-by: Heiko Stuebner <heiko@xxxxxxxxx>
> ---
> drivers/clk/rockchip/clk-rk3188.c | 11 +++--------
> drivers/clk/rockchip/clk-rk3288.c | 16 +++++-----------
> 2 files changed, 8 insertions(+), 19 deletions(-)

Reviewed-by: Douglas Anderson <dianders@xxxxxxxxxxxx>
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at
Please read the FAQ at