Re: [RFC PATCH] tsc: synchronize TSCs on buggy Intel Xeon E5 CPUs with offset error

From: Josh Hunt
Date: Tue Nov 10 2015 - 15:42:05 EST

On Tue, Nov 10, 2015 at 1:47 PM, Gratian Crisan <gratian.crisan@xxxxxx> wrote:
> The observed behavior does seem to match BT81 errata i.e. the TSC does
> not get reset on warm reboots and it is otherwise stable.
If you have a simple testcase to reproduce the problem I'd be
interested in seeing it.

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