Re: [PATCH v7 1/4] Documentation: dt-bindings: Describe SROMc configuration
From: Rob Herring
Date: Wed Nov 11 2015 - 15:43:39 EST
On Wed, Nov 11, 2015 at 12:44 AM, Pavel Fedin <p.fedin@xxxxxxxxxxx> wrote:
>> > +- samsung,srom-timing : array of 6 integers, specifying bank timings in the
>> > + following order: Tacp, Tcah, Tcoh, Tacc, Tcos, Tacs.
>> > + Each value is specified in cycles and has the following
>> > + meaning and valid range:
>> > + Tacp : Page mode access cycle at Page mode (0 - 15)
>> > + Tcah : Address holding time after CSn (0 - 15)
>> > + Tcoh : Chip selection hold on OEn (0 - 15)
>> > + Tacc : Access cycle (0 - 31, the actual time is N + 1)
>> > + Tcos : Chip selection set-up before OEn (0 - 15)
>> > + Tacs : Address set-up before CSn (0 - 15)
>> This is not easily extended. Perhaps a property per value instead.
> We had a discussion with Krzysztof about it, he agreed with this form of the property.
> My concern was that it's just too much typing, and makes little sense because these
> settings always go together. If register layout changes, or parameter set changes in
> incompatible way, then it's another device, not exynos-srom anymore.
> So would you agree with that, or is your position strong?
I'm thinking for a new version of the controller which could add (or
remove) new timing parameters, but then I guess you can interpret the
field differently based on the compatible string. Anyway, your problem
to deal with.
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