Re: [PATCH v2 1/4] drm: arm: Add DT bindings documentation for HDLCD driver.
From: Jon Medhurst (Tixy)
Date: Thu Nov 12 2015 - 05:52:38 EST
On Thu, 2015-11-12 at 10:42 +0000, Liviu Dudau wrote:
> > This is on-chip RAM or nornal system RAM? We already have bindings
> > both.
> Juno has a set of TLX (ThinLinks) connectors on the board where an
> FPGA can be attached. On r1
> the code running on FPGA can even participate as an AXI master with
> full coherency. The FPGA
> has local memory that we want to share with the HDLCD to be used as a
The HDLCD on the Juno chip or one implemented in the FPGA? I assume you
mean the latter but just wanted to check.
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