Re: [PATCH v3 1/5] spi: introduce mmap read support for spi flash devices

From: Vignesh R
Date: Tue Nov 17 2015 - 01:33:21 EST

Hi Brian,

On 11/13/2015 09:35 PM, Cyrille Pitchen wrote:


> In September I've sent a series of patches to enhance the support of QSPI flash
> memories. Patch 4 was dedicated to the m25p80 driver and set the
> rx_nbits / tx_nbits fields of spi_transfer struct(s) in order to configure the
> number of I/O lines independently for the opcode, address and data parts.
> The work was done for m25p80_read() but also for _read_reg(), _write_reg() and
> _write().
> The patched m25p80 driver was then tested with an at25 memory to check non-
> regression.
> This series of patches also added 4 enum spi_protocol fields inside struct
> spi_nor so the spi-nor framework can tell the (Q)SPI controller driver what SPI
> protocol should be use for erase, read, write and register read/write
> operations, depending on the memory manufacturer and the command opcode.
> This was done to better support Micron, Spansion and Macronix QSPI memories.
> I have tested the series with Micron QSPI memories and Atmel QSPI controller
> and I guess Marek also tested it on his side with Spansion QSPI memories and
> another QSPI controller.
> So if it can help other developers to develop QSPI controller drivers, the
> series is still available there:
> for the whole series:
> for patch 4 (depends on patch 2 for enum spi_protocol):

Should I rebase my next version on top of above patches by Cyrille or
shall I post on top of 4.4-rc1?

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