Re: [PATCH 00/25] serial: sh-sci: Add external clock and BRG Support

From: Geert Uytterhoeven
Date: Fri Nov 20 2015 - 03:22:22 EST

Hi Laurent,

On Thu, Nov 19, 2015 at 10:08 PM, Laurent Pinchart
<laurent.pinchart@xxxxxxxxxxxxxxxx> wrote:
> For patches 3-6, 13, 15-16 and 22 and 24,
> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@xxxxxxxxxxxxxxxx>

Many thanks for your review comments!

> I'm not sure I'd bother with patch 25/25, but I'm not against merging it
> either. I'd be surprised if the serial driver still worked at all on SH :-)

It should not cause problems, as long as sh7734 doesn't add the optional
clocks ;-)

> On Thursday 19 November 2015 19:38:39 Geert Uytterhoeven wrote:
>> This patch series adds support to the Renesas SCI serial driver for
>> - the optional external clock on (H)SCI(F) and some SCIFA, where this
>> pin can serve as a clock input,
>> - the optional clock sources for the Baud Rate Generator for External
>> Clock (BRG), as found on some SCIF variants and on HSCIF.
> Could you briefly explain (and even better in a source code comment) how you
> handle baud rate calculation with the chained BRGs ?

I'll do that. Note that there's no chaining of BRGs, only muxing (so yes, it
needs more clarification ;-).

There can be 4 possible sources for the sampling clock:
1. Internal BRG (BRR register),
2. (H)SCK,
3. BRG for external clock
a. Using SCIF_CLK,
b. Using the bus clock.



Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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