Re: [PATCH 09/14] DEVICETREE: Add bindings for PIC32 usart driver

[Rob Herring]

On Fri, Nov 20, 2015 at 05:17:21PM -0700, Joshua Henderson wrote:
> From: Andrei Pistirica <andrei.pistirica@xxxxxxxxxxxxx>
> 
> Document the devicetree bindings for the USART peripheral found on
> Microchip PIC32 class devices.
> 
> Signed-off-by: Andrei Pistirica <andrei.pistirica@xxxxxxxxxxxxx>
> Signed-off-by: Joshua Henderson <joshua.henderson@xxxxxxxxxxxxx>
> ---
>  .../bindings/serial/microchip,pic32-usart.txt      |   29 ++++++++++++++++++++
>  1 file changed, 29 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/serial/microchip,pic32-usart.txt
> 
> diff --git a/Documentation/devicetree/bindings/serial/microchip,pic32-usart.txt b/Documentation/devicetree/bindings/serial/microchip,pic32-usart.txt
> new file mode 100644
> index 0000000..c87321c
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/serial/microchip,pic32-usart.txt
> @@ -0,0 +1,29 @@
> +* Microchip Universal Synchronous Asynchronous Receiver/Transmitter (USART)
> +
> +Required properties:
> +- compatible: Should be "microchip,pic32-usart"

Again, should be more specific.

> +- reg: Should contain registers location and length
> +- interrupts: Should contain interrupt
> +- pinctrl: Should contain pinctrl for TX/RX/RTS/CTS
> +
> +Optional properties:
> +- microchip,uart-has-rtscts : Indicate the uart has hardware flow control
> +- rts-gpios: RTS pin for USP-based UART if microchip,uart-has-rtscts
> +- cts-gpios: CTS pin for USP-based UART if microchip,uart-has-rtscts

This appears to just be copied for Sirf UART.

Doesn't *-gpios being present imply having h/w 
flow-control (i.e. microchip,uart-has-rtscts)?

Rob

> +
> +Example:
> +	usart0: serial@1f822000 {
> +		compatible = "microchip,pic32-usart";
> +		reg = <0x1f822000 0x50>;
> +		interrupts = <UART1_FAULT DEFAULT_INT_PRI IRQ_TYPE_NONE>,
> +			     <UART1_RECEIVE_DONE DEFAULT_INT_PRI IRQ_TYPE_NONE>,
> +			     <UART1_TRANSFER_DONE DEFAULT_INT_PRI IRQ_TYPE_NONE>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <
> +			&pinctrl_uart1
> +			&pinctrl_uart1_cts
> +			&pinctrl_uart1_rts>;
> +		microchip,uart-has-rtscts;
> +		cts-gpios = <&pioB 15 0>;
> +		rts-gpios = <&pioD 1 0>;
> +	};
> -- 
> 1.7.9.5
> 
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