Re: [PATCH 1/2] mmc: sdhci: set bus voltage before enabling bus power

[Ulf Hansson]

On 24 November 2015 at 14:12, Ludovic Desroches
<ludovic.desroches@xxxxxxxxx> wrote:
> On Tue, Nov 24, 2015 at 12:01:53PM +0100, Ulf Hansson wrote:
>> On 24 November 2015 at 10:23, Ludovic Desroches
>> <ludovic.desroches@xxxxxxxxx> wrote:
>> > Hi Ulf,
>> >
>> > On Mon, Nov 09, 2015 at 05:30:26PM +0100, Ludovic Desroches wrote:
>> >> On Mon, Nov 09, 2015 at 05:00:46PM +0100, Ulf Hansson wrote:
>> >
>> > [...]
>> >
>> >> > Now, this discussion was interesting, but I forgot what problem you
>> >> > actually where trying to solve? :-)
>> >>
>> >> There is this discussion because of two things:
>> >> - Fixing something I consider as a bug: when I have a VMMC, only
>> >>   setting/clearing bit 0. Our controller strictly obeys to the spec and
>> >>   check the 'SD Bus Voltage Select' field. Since we put a reserved value
>> >>   (000), the Power On is not performed.
>> >> - I was trying to get help to understand what is this 'SD Bus Voltage'.
>> >>   For our controller and sdhci_set_power(), it seems to stand for VMMC.
>> >>   For me, everything concerning bus voltage is related to VQMMC, so I was
>> >>   disappointed.
>> >
>> > Do you plan to take the patch for VMMC? If yes, I will send a new patch
>> > for the device tree (I'll only add vmmc, not vqmmc as discussed); if
>> > not, forget these two patches.
>> >
>>
>> Which patch do you refer to for "VMMC"?
>>
>
> This one to not write an invalid voltage in the power control register
> even if we have an external regulator for vmmc.
>

As I stated earlier, according to the SDHCI spec in the section for
the Power Control Register. Bit 0 needs to be set when communicating
with the card as it will for
example enable the clock.

I suspect if I apply your patch several sdhci variants would break,
don't you think?

Kind regards
Uffe
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