Re: [PATCH linux-next (v3) 1/2] reset: Add brcm,bcm6345-reset device tree binding

[Rob Herring]

On Thu, Dec 10, 2015 at 09:28:38PM +0000, Simon Arlott wrote:
> Add device tree binding for the BCM6345 soft reset controller.
> 
> The BCM6345 contains a soft-reset controller activated by setting
> a bit (that must previously have been cleared).
> 
> Signed-off-by: Simon Arlott <simon@xxxxxxxxxxx>
> ---
> v3: Resend. Example has changed because usbh now has two compatible
>     strings and uses a power domain instead of a regulator.

Not really all that important to this binding definition, so you can 
keep my ack.

> 
> v2: Renamed to bcm6345, removed "mask" property.
>     Acked-by: Rob Herring <robh@xxxxxxxxxx>
> 
>  .../bindings/reset/brcm,bcm6345-reset.txt          | 33 ++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.txt
> 
> diff --git a/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.txt b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.txt
> new file mode 100644
> index 0000000..0313040
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/brcm,bcm6345-reset.txt
> @@ -0,0 +1,33 @@
> +Broadcom BCM6345 reset controller
> +
> +The BCM6345 contains a basic soft reset controller in the perf register
> +set which resets components using a bit in a register.
> +
> +Please also refer to reset.txt in this directory for common reset
> +controller binding usage.
> +
> +Required properties:
> +- compatible:	Should be "brcm,bcm<soc>-reset", "brcm,bcm6345-reset"
> +- regmap:	The register map phandle
> +- offset:	Offset in the register map for the reset register (in bytes)
> +- #reset-cells:	Must be set to 1
> +
> +Example:
> +
> +periph_soft_rst: reset-controller {
> +	compatible = "brcm,bcm63168-reset", "brcm,bcm6345-reset";
> +	regmap = <&periph_cntl>;
> +	offset = <0x10>;
> +
> +	#reset-cells = <1>;
> +};
> +
> +usbh: usbphy@10002700 {
> +	compatible = "brcm,bcm63168-usbh", "brcm,bcm6328-usbh";
> +	reg = <0x10002700 0x38>;
> +	clocks = <&periph_clk 13>, <&timer_clk 18>;
> +	resets = <&periph_soft_rst 6>;
> +	power-domains = <&misc_iddq_ctrl 4>;
> +	#phy-cells = <0>;
> +};
> +
> -- 
> 2.1.4
> 
> -- 
> Simon Arlott
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