Re: [PATCH v2 1/2] ARM: dts: imx6: Add support for Toradex Apalis iMX6Q/D SoM

From: Marcel Ziswiler
Date: Fri Jan 08 2016 - 03:44:07 EST

Hi Stefan

On Wed, 2016-01-06 at 22:29 -0800, Stefan Agner wrote:
> Hi Marcel,
>
> On 2016-01-05 08:39, Marcel Ziswiler wrote:
> > From: Petr Åtetiar <ynezz@xxxxxxx>
> >
> > Signed-off-by: Petr Åtetiar <ynezz@xxxxxxx>
> > Signed-off-by: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx>
> > ---
> >
> > Changes in v2:
> > - clarify exact Apalis iMX6Q/D SoM type in cover letter
> > - clarify exact Apalis iMX6Q/D module type and Ixora carrier board
> > in model
> > Â node
> > - got rid of obsolete mmc aliases
> > - working SGTL5000 audio/sound integration
> > - working STMPE811 touch screen controller integration
> > - integrated review feedback from Lucas
> > - left and even added some more comments as I don't see why putting
> > any
> > Â explanatory comments in dts' should be such a bad thing to do
> > - completely got rid of the memory node as that is something
> > typically filled
> > Â in by the boot loader e.g. U-Boot
> > - without the regulators simple-bus it no longer boots
> > - even though we supposedly shipped a few hundred V1.0a modules
> > drop DCE UART
> > Â support for now and simplify file layout
> > - replaced obsolete no-1-8-v by mainline supported voltage-ranges =
> > <3300 3300>
> > Â usdhc property and yes card detects are indeed active low (;-p)
> > - integrated review feedback from Stefan
> > - fixed Ethernet PHY reset & interrupt (requires Micrel PHY driver
> > to be
> > Â enabled)
> > - fixed HDMI DDC (requires GPIO-based bitbanging I2C to be enabled)
> > - fixed SPDIF
> >
> > Âarch/arm/boot/dts/imx6qdl-apalis.dtsi | 1040
> > +++++++++++++++++++++++++++++++++
> > Â1 file changed, 1040 insertions(+)
> > Âcreate mode 100644 arch/arm/boot/dts/imx6qdl-apalis.dtsi
> >
> > diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> > b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> > new file mode 100644
> > index 0000000..6104e2e
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
> > @@ -0,0 +1,1040 @@
> > +/*
> > + * Copyright 2014-2016 Toradex AG
> > + * Copyright 2012 Freescale Semiconductor, Inc.
> > + * Copyright 2011 Linaro Ltd.
> > + *
> > + * This file is dual-licensed: you can use it either under the
> > terms
> > + * of the GPL or the X11 license, at your option. Note that this
> > dual
> > + * licensing only applies to this file, and not this project as a
> > + * whole.
> > + *
> > + *ÂÂa) This file is free software; you can redistribute it and/or
> > + *ÂÂÂÂÂmodify it under the terms of the GNU General Public License
> > + *ÂÂÂÂÂversion 2 as published by the Free Software Foundation.
> > + *
> > + *ÂÂÂÂÂThis file is distributed in the hope that it will be useful
> > + *ÂÂÂÂÂbut WITHOUT ANY WARRANTY; without even the implied warranty
> > of
> > + *ÂÂÂÂÂMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.ÂÂSee
> > the
> > + *ÂÂÂÂÂGNU General Public License for more details.
> > + *
> > + * Or, alternatively
> > + *
> > + *ÂÂb) Permission is hereby granted, free of charge, to any person
> > + *ÂÂÂÂÂobtaining a copy of this software and associated
> > documentation
> > + *ÂÂÂÂÂfiles (the "Software"), to deal in the Software without
> > + *ÂÂÂÂÂrestriction, including without limitation the rights to use
> > + *ÂÂÂÂÂcopy, modify, merge, publish, distribute, sublicense,
> > and/or
> > + *ÂÂÂÂÂsell copies of the Software, and to permit persons to whom
> > the
> > + *ÂÂÂÂÂSoftware is furnished to do so, subject to the following
> > + *ÂÂÂÂÂconditions:
> > + *
> > + *ÂÂÂÂÂThe above copyright notice and this permission notice shall
> > be
> > + *ÂÂÂÂÂincluded in all copies or substantial portions of the
> > Software.
> > + *
> > + *ÂÂÂÂÂTHE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
> > + *ÂÂÂÂÂEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE
> > WARRANTIES
> > + *ÂÂÂÂÂOF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> > + *ÂÂÂÂÂNONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
> > + *ÂÂÂÂÂHOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
> > + *ÂÂÂÂÂWHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> > ARISING
> > + *ÂÂÂÂÂFROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
> > OR
> > + *ÂÂÂÂÂOTHER DEALINGS IN THE SOFTWARE.
> > + */
> > +
> > +#include <dt-bindings/gpio/gpio.h>
> > +
> > +/ {
> > + model = "Toradex Apalis iMX6Q/D Module";
> > + compatible = "toradex,apalis_imx6q", "fsl,imx6q";
> > +
> > + backlight: backlight {
> > + compatible = "pwm-backlight";
> > + pwms = <&pwm4 0 5000000>;
> > + status = "disabled";
> > + };
> > +
> > + /* DDC_I2C: I2C2_SDA/SCL on MXM3 205/207 */
> > + i2cddc: i2c@0 {
> > + compatible = "i2c-gpio";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c_ddc>;
> > + gpios = <&gpio3 16 GPIO_ACTIVE_HIGH /* sda */
> > + Â&gpio2 30 GPIO_ACTIVE_HIGH /* scl */
> > + >;
> > + i2c-gpio,delay-us = <2>; /* ~100 kHz */
> > + status = "okay";
> > + };
> > +
> > + regulators {
> > + compatible = "simple-bus";
> > +
> > + reg_1p8v: 1p8v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "1P8V";
> > + regulator-min-microvolt = <1800000>;
> > + regulator-max-microvolt = <1800000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_2p5v: 2p5v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "2P5V";
> > + regulator-min-microvolt = <2500000>;
> > + regulator-max-microvolt = <2500000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_3p3v: 3p3v {
> > + compatible = "regulator-fixed";
> > + regulator-name = "3P3V";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + regulator-always-on;
> > + };
> > +
> > + reg_usb_otg_vbus: usb_otg_vbus {
> > + compatible = "regulator-fixed";
> > + pinctrl-names = "default";
> > + pinctrl-0 =
> > <&pinctrl_regulator_usbotg_pwr>;
> > + regulator-name = "usb_otg_vbus";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > + status = "disabled";
> > + };
> > +
> > + /* on module usb hub */
> > + reg_usb_host_vbus_hub: usb_host_vbus_hub {
> > + compatible = "regulator-fixed";
> > + pinctrl-names = "default";
> > + pinctrl-0 =
> > <&pinctrl_regulator_usbhub_pwr>;
> > + regulator-name = "usb_host_vbus_hub";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + gpio = <&gpio3 28 GPIO_ACTIVE_HIGH>;
> > + startup-delay-us = <2000>;
> > + enable-active-high;
> > + status = "okay";
> > + };
> > +
> > + reg_usb_host_vbus: usb_host_vbus {
> > + compatible = "regulator-fixed";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
> > + regulator-name = "usb_host_vbus";
> > + regulator-min-microvolt = <5000000>;
> > + regulator-max-microvolt = <5000000>;
> > + gpio =ÂÂ<&gpio1 0 GPIO_ACTIVE_HIGH>;
> > + enable-active-high;
> > + vin-supply = <&reg_usb_host_vbus_hub>;
> > + status = "disabled";
> > + };
> > + };
> > +
> > + sound {
> > + compatible = "fsl,imx-audio-sgtl5000";
> > + model = "imx6q-apalis-sgtl5000";
> > + ssi-controller = <&ssi1>;
> > + audio-codec = <&codec>;
> > + audio-routing =
> > + "LINE_IN", "Line In Jack",
> > + "MIC_IN", "Mic Jack",
> > + "Mic Jack", "Mic Bias",
> > + "Headphone Jack", "HP_OUT";
> > + mux-int-port = <1>;
> > + mux-ext-port = <4>;
> > + };
> > +
> > + sound_spdif: sound-spdif {
> > + compatible = "fsl,imx-audio-spdif";
> > + model = "imx-spdif";
> > + spdif-controller = <&spdif>;
> > + spdif-in;
> > + spdif-out;
> > + status = "disabled";
> > + };
> > +};
> > +
> > +&audmux {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_audmux &pinctrl_audmux_mclk>;
> > + status = "okay";
> > +};
> > +
> > +/* Apalis SPI1 */
> > +&ecspi1 {
> > + fsl,spi-num-chipselects = <1>;
> > + cs-gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_spi_cs1>;
> > + status = "disabled";
> > +};
> > +
> > +/* Apalis SPI2 */
> > +&ecspi2 {
> > + fsl,spi-num-chipselects = <1>;
> > + cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_spi_cs2>;
> > + status = "disabled";
> > +};
> > +
> > +&fec {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_enet &pinctrl_enet_ctrl>;
> > + phy-mode = "rgmii";
> > + phy-handle = <&ethphy>;
> > + phy-reset-duration = <10>;
> > + phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
> > + status = "okay";
> > +
> > + mdio {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + ethphy: ethernet-phy@7 {
> > + interrupt-parent = <&gpio1>;
> > + interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
> > + reg = <7>;
> > + };
> > + };
> > +};
> > +
> > +&can1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_flexcan1>;
> > + status = "disabled";
> > +};
> > +
> > +&can2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_flexcan2>;
> > + status = "disabled";
> > +};
> > +
> > +&hdmi {
> > + ddc-i2c-bus = <&i2cddc>;
> > + status = "okay";
> > +};
> > +
> > +/*
> > + * GEN1_I2C: I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier
> > + * board)
> > + */
> > +&i2c1 {
> > + clock-frequency = <100000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c1>;
> > + status = "disabled";
> > +};
> > +
> > +&i2c2 {
> > + clock-frequency = <100000>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_i2c2>;
> > + status = "okay";
> > +
> > + pmic: pfuze100@08 {
> > + compatible = "fsl,pfuze100";
> > + reg = <0x08>;
> > +
> > + regulators {
> > + sw1a_reg: sw1ab {
> > + regulator-min-microvolt =
> > <300000>;
> > + regulator-max-microvolt =
> > <1875000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + regulator-ramp-delay = <6250>;
> > + };
> > +
> > + sw1c_reg: sw1c {
> > + regulator-min-microvolt =
> > <300000>;
> > + regulator-max-microvolt =
> > <1875000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + regulator-ramp-delay = <6250>;
> > + };
> > +
> > + sw3a_reg: sw3a {
> > + regulator-min-microvolt =
> > <400000>;
> > + regulator-max-microvolt =
> > <1975000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + swbst_reg: swbst {
> > + regulator-min-microvolt =
> > <5000000>;
> > + regulator-max-microvolt =
> > <5150000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + snvs_reg: vsnvs {
> > + regulator-min-microvolt =
> > <1000000>;
> > + regulator-max-microvolt =
> > <3000000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + vref_reg: vrefddr {
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + vgen1_reg: vgen1 {
> > + regulator-min-microvolt =
> > <800000>;
> > + regulator-max-microvolt =
> > <1550000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + vgen2_reg: vgen2 {
> > + regulator-min-microvolt =
> > <800000>;
> > + regulator-max-microvolt =
> > <1550000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + vgen3_reg: vgen3 {
> > + regulator-min-microvolt =
> > <1800000>;
> > + regulator-max-microvolt =
> > <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + vgen4_reg: vgen4 {
> > + regulator-min-microvolt =
> > <1800000>;
> > + regulator-max-microvolt =
> > <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + vgen5_reg: vgen5 {
> > + regulator-min-microvolt =
> > <1800000>;
> > + regulator-max-microvolt =
> > <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > +
> > + vgen6_reg: vgen6 {
> > + regulator-min-microvolt =
> > <1800000>;
> > + regulator-max-microvolt =
> > <3300000>;
> > + regulator-boot-on;
> > + regulator-always-on;
> > + };
> > + };
> > + };
> > +
> > + codec: sgtl5000@0a {
> > + compatible = "fsl,sgtl5000";
> > + reg = <0x0a>;
> > + clocks = <&clks 201>;
> > + VDDA-supply = <&reg_2p5v>;
> > + VDDIO-supply = <&reg_3p3v>;
>
> Nit: The device tree bindings mention two more properties as required
> properties:
> micbias-resistor-k-ohms
> micbias-voltage-m-volts
>
> However, both have "If this node is not mentioned", hence I guess
> they
> are actually optional, but maybe we want to set an explicit value
> here?

Remember we don't make use of any of that microphone bias stuff on any
of our Apalis hardware.

> > + };
> > +
> > + /* STMPE811 touch screen controller */
> > + stmpe811@41 {
> > + compatible = "st,stmpe811";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_touch_int>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x41>;
> > + interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
> > + interrupt-parent = <&gpio4>;
> > + interrupt-controller;
> > + id = <0>;
> > + blocks = <0x5>;
> > + irq-trigger = <0x1>;
> > + stmpe_touchscreen {
> > + compatible = "st,stmpe-ts";
> > + reg = <0>;
> > + /* 3.25 MHz ADC clock speed */
> > + st,adc-freq = <1>;
> > + /* 8 sample average control */
> > + st,ave-ctrl = <3>;
> > + /* 7 length fractional part in z */
> > + st,fraction-z = <7>;
> > + /*
> > + Â* 50 mA typical 80 mA max touchscreen
> > drivers
> > + Â* current limit value
> > + Â*/
> > + st,i-drive = <1>;
> > + /* 12-bit ADC */
> > + st,mod-12b = <1>;
> > + /* internal ADC reference */
> > + st,ref-sel = <0>;
> > + /* ADC converstion time: 80 clocks */
> > + st,sample-time = <4>;
> > + /* 1 ms panel driver settling time */
> > + st,settling = <3>;
> > + /* 5 ms touch detect interrupt delay */
> > + st,touch-det-delay = <5>;
> > + };
> > + };
> > +};
> > +
> > +/*
> > + * GEN2_I2C, CAM: I2C3_SDA/SCL on MXM3 201/203 (unused)
> > + */
> > +&i2c3 {
> > + clock-frequency = <100000>;
> > + pinctrl-names = "default", "recovery";
> > + pinctrl-0 = <&pinctrl_i2c3>;
> > + pinctrl-1 = <&pinctrl_i2c3_recovery>;
> > + scl-gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
> > + sda-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
> > + status = "disabled";
> > +};
> > +
> > +/* PAD Ctrl values for common settings */
> > +/*
> > + * (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | PAD_CTL_PKE
> > |
> > + *ÂÂPAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)
> > + */
> > +#define PAD_CTRL_HYS_PU 0x1b0b0
> > +
> > +/*
> > + * (PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED |
> > + *ÂÂPAD_CTL_DSE_40ohm)
> > + */
> > +#define PAD_CTRL_HYS_PD 0x130b0
> > +
> > +/*
> > + * (PAD_CTL_PUS_22K_UP | PAD_CTL_PUE | PAD_CTL_PKE |
> > PAD_CTL_SPEED_LOW |
> > + *ÂÂPAD_CTL_DSE_80ohm)
> > + */
> > +#define PAD_CTRL_PU_22k 0x0f058
> > +
> > +&iomuxc {
>
> I think it is a convention to move iomuxc at the very end for better
> readability of the rest. At least the Vybrid dts and the more
> recently
> added imx7d-sdb.dts follow this rule.

Yes, while the Tegras have it at the beginning NXP wants it at the end
(;-p).

> > + ecspi {
> > + pinctrl_ecspi1: ecspi1grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO
> > 0x100b1
> > + MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI
> > 0x100b1
> > + MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK
> > 0x100b1
> > + >;
> > + };
> > + pinctrl_ecspi2: ecspi2grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_EIM_OE__ECSPI2_MISO
> > 0x100b1
> > + MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI
> > 0x100b1
> > + MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK
> > 0x100b1
> > + >;
> > + };
> > + pinctrl_spi_cs1: spi_cs1 {
> > + fsl,pins = <
> > + /* SPI1 cs */
> > + MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25
> > 0x000b1
> > + >;
> > + };
> > + pinctrl_spi_cs2: spi_cs2 {
> > + fsl,pins = <
> > + /* SPI2 cs */
> > + MX6QDL_PAD_EIM_RW__GPIO2_IO26
> > 0x000b1
> > + >;
> > + };
> > + };
> > +
> > + flexcan {
> > + pinctrl_flexcan1: flexcan1grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_7__FLEXCAN1_TX
> > 0x1b0b0
> > + MX6QDL_PAD_GPIO_8__FLEXCAN1_RX
> > 0x1b0b0
> > + >;
> > + };
> > + pinctrl_flexcan2: flexcan2grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX
> > 0x1b0b0
> > + MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX
> > 0x1b0b0
> > + >;
> > + };
> > + };
> > +
> > + gpio {
> > + pinctrl_apalis_gpio1: apalis_gpio1 {
> > + fsl,pins = <
> > + MX6QDL_PAD_NANDF_D4__GPIO2_IO04
> > PAD_CTRL_HYS_PD
> > + >;
> > + };
> > + pinctrl_apalis_gpio2: apalis_gpio2 {
> > + fsl,pins = <
> > + MX6QDL_PAD_NANDF_D5__GPIO2_IO05
> > PAD_CTRL_HYS_PD
> > + >;
> > + };
> > + pinctrl_apalis_gpio3: apalis_gpio3 {
> > + fsl,pins = <
> > + MX6QDL_PAD_NANDF_D6__GPIO2_IO06
> > PAD_CTRL_HYS_PD
> > + >;
> > + };
> > + pinctrl_apalis_gpio4: apalis_gpio4 {
> > + fsl,pins = <
> > + MX6QDL_PAD_NANDF_D7__GPIO2_IO07
> > PAD_CTRL_HYS_PD
> > + >;
> > + };
> > + pinctrl_apalis_gpio5: apalis_gpio5 {
> > + fsl,pins = <
> > + MX6QDL_PAD_NANDF_RB0__GPIO6_IO10
> > PAD_CTRL_HYS_PD
> > + >;
> > + };
> > + pinctrl_apalis_gpio6: apalis_gpio6 {
> > + fsl,pins = <
> > + MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09
> > + PAD_CTRL_HYS_PD
>
> The 80 character limit normally is not enforced for device trees,
> hence
> I would remove that line break here...

Yes, and then trying to teach patman to actually ignore that warning
(;-p).

> > + >;
> > + };
> > + pinctrl_apalis_gpio7: apalis_gpio7 {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_2__GPIO1_IO02
> > PAD_CTRL_HYS_PD
> > + >;
> > + };
> > + pinctrl_apalis_gpio8: apalis_gpio8 {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_6__GPIO1_IO06
> > PAD_CTRL_HYS_PD
> > + >;
> > + };
> > + pinctrl_gpio_keys: gpio_keys {
> > + fsl,pins = <
> > + /* Power Button */
> > + MX6QDL_PAD_GPIO_4__GPIO1_IO04
> > PAD_CTRL_HYS_PU
> > + >;
> > + };
> > + };
> > +
> > + hdmi {
> > + pinctrl_hdmi_cec: hdmicecgrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_L
> > INE 0x1f8b0
> > + >;
> > + };
> > + };
> > +
> > + i2c {
> > + pinctrl_i2c_ddc: i2c_ddc {
> > + fsl,pins = <
> > + /* DDC bitbang */
> > + MX6QDL_PAD_EIM_EB2__GPIO2_IO30
> > PAD_CTRL_HYS_PU
> > + MX6QDL_PAD_EIM_D16__GPIO3_IO16
> > PAD_CTRL_HYS_PU
> > + >;
> > + };
> > + pinctrl_i2c1: i2c1grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA
> > 0x4001b8b1
> > + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL
> > 0x4001b8b1
> > + >;
> > + };
> > + pinctrl_i2c3: i2c3grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_EIM_D17__I2C3_SCL
> > 0x4001b8b1
> > + MX6QDL_PAD_EIM_D18__I2C3_SDA
> > 0x4001b8b1
> > + >;
> > + };
> > + pinctrl_i2c3_recovery: i2c3-recoverygrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_EIM_D17__GPIO3_IO17
> > 0x4001b8b1
> > + MX6QDL_PAD_EIM_D18__GPIO3_IO18
> > 0x4001b8b1
> > + >;
> > + };
> > + };
> > +
> > + /* pins used on module */
> > + imx6q-apalis {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_reset_moci
> > &pinctrl_emmc_reset>;
> > + pinctrl_audmux: audmuxgrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_DISP0_DAT20__AUD4_TXC
> > 0x130b0
> > + MX6QDL_PAD_DISP0_DAT21__AUD4_TXD
> > 0x130b0
> > + MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS
> > 0x130b0
> > + MX6QDL_PAD_DISP0_DAT23__AUD4_RXD
> > 0x130b0
> > + >;
> > + };
> > + pinctrl_audmux_mclk: audmux_mclk {
> > + fsl,pins = <
> > + /* SGTL5000 sys_mclk */
> > + MX6QDL_PAD_GPIO_5__CCM_CLKO1
> > 0x130b0
> > + >;
> > + };
> > + pinctrl_emmc_reset: emmc_reset {
> > + fsl,pins = <
> > + /* eMMC reset, leave it alone */
> > + MX6QDL_PAD_SD3_RST__GPIO7_IO08
> > PAD_CTRL_PU_22k
> > + >;
> > + };
> > + pinctrl_enet: enetgrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_ENET_MDIO__ENET_MDIO
> > 0x100b0
> > + MX6QDL_PAD_ENET_MDC__ENET_MDC
> > 0x100b0
> > + MX6QDL_PAD_RGMII_TXC__RGMII_TXC
> > 0x100b0
> > + MX6QDL_PAD_RGMII_TD0__RGMII_TD0
> > 0x100b0
> > + MX6QDL_PAD_RGMII_TD1__RGMII_TD1
> > 0x100b0
> > + MX6QDL_PAD_RGMII_TD2__RGMII_TD2
> > 0x100b0
> > + MX6QDL_PAD_RGMII_TD3__RGMII_TD3
> > 0x100b0
> > + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_
> > CTL 0x100b0
> > + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_C
> > LK 0x100b0
> > + MX6QDL_PAD_RGMII_RXC__RGMII_RXC
> > 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD0__RGMII_RD0
> > 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD1__RGMII_RD1
> > 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD2__RGMII_RD2
> > 0x1b0b0
> > + MX6QDL_PAD_RGMII_RD3__RGMII_RD3
> > 0x1b0b0
> > + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_
> > CTL 0x1b0b0
> > + >;
> > + };
> > + pinctrl_enet_ctrl: enet_ctrlgrp {
> > + fsl,pins = <
> > + /* Ethernet PHY reset */
> > + MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25
> > 0x000b0
> > + /* Ethernet PHY interrupt */
> > + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30
> > 0x000b1
> > + >;
> > + };
> > + pinctrl_i2c2: i2c2grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL3__I2C2_SCL
> > 0x4001b8b1
> > + MX6QDL_PAD_KEY_ROW3__I2C2_SDA
> > 0x4001b8b1
> > + >;
> > + };
> > + pinctrl_ipu2_vdac: ipu2vdacgrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_
> > DISP_CLK 0xd1
> > + MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN
> > 15ÂÂÂÂÂÂÂ0xd1
> > + MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN0
> > 2ÂÂÂÂÂÂÂÂ0xd1
> > + MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN0
> > 3ÂÂÂÂÂÂÂÂ0xd1
> > + MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_
> > DATA00ÂÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_
> > DATA01ÂÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_
> > DATA02ÂÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_
> > DATA03ÂÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_
> > DATA04ÂÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_
> > DATA05ÂÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_
> > DATA06ÂÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_
> > DATA07ÂÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_
> > DATA08ÂÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_
> > DATA09ÂÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0
> > _DATA10ÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0
> > _DATA11ÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0
> > _DATA12ÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0
> > _DATA13ÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0
> > _DATA14ÂÂ0xf9
> > + MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0
> > _DATA15ÂÂ0xf9
> > + >;
> > + };
> > + pinctrl_regulator_usbhub_pwr:
> > gpio_regulator_usbhub_pwr {
> > + fsl,pins = <
> > + /* USBH_HUB_EN */
> > + MX6QDL_PAD_EIM_D28__GPIO3_IO28
> > PAD_CTRL_PU_22k
> > + >;
> > + };
> > + pinctrl_reset_moci: gpio_reset_moci {
> > + fsl,pins = <
> > + /* RESET_MOCI control */
> > + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28
> > + PAD_CTRL_PU_22k
> > + >;
> > + };
> > + pinctrl_touch_int: touch_intgrp {
> > + fsl,pins = <
> > + /* STMPE811 interrupt */
> > + MX6QDL_PAD_KEY_COL2__GPIO4_IO10
> > PAD_CTRL_HYS_PU
> > + >;
> > + };
> > + pinctrl_usdhc3: usdhc3grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMDÂÂÂÂ0x1
> > 7059
> > + MX6QDL_PAD_SD3_CLK__SD3_CLKÂÂÂÂ0x1
> > 0059
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0
> > 0x17059
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1
> > 0x17059
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2
> > 0x17059
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3
> > 0x17059
> > + MX6QDL_PAD_SD3_DAT4__SD3_DATA4
> > 0x17059
> > + MX6QDL_PAD_SD3_DAT5__SD3_DATA5
> > 0x17059
> > + MX6QDL_PAD_SD3_DAT6__SD3_DATA6
> > 0x17059
> > + MX6QDL_PAD_SD3_DAT7__SD3_DATA7
> > 0x17059
> > + >;
> > + };
> > + pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { /*
> > 100Mhz */
>
> I do not have a strong opinion on comments, but if they are pure
> duplication of what is already there, I kind of prefer to not add
> them...

Agreed.

> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD
> > 0x170B9
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK
> > 0x100B9
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0
> > 0x170B9
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1
> > 0x170B9
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2
> > 0x170B9
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3
> > 0x170B9
> > + MX6QDL_PAD_SD3_DAT4__SD3_DATA4
> > 0x170B9
> > + MX6QDL_PAD_SD3_DAT5__SD3_DATA5
> > 0x170B9
> > + MX6QDL_PAD_SD3_DAT6__SD3_DATA6
> > 0x170B9
> > + MX6QDL_PAD_SD3_DAT7__SD3_DATA7
> > 0x170B9
> > + >;
> > + };
> > + pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { /*
> > 200Mhz */
> > + fsl,pins = <
> > + MX6QDL_PAD_SD3_CMD__SD3_CMD
> > 0x170F9
> > + MX6QDL_PAD_SD3_CLK__SD3_CLK
> > 0x100F9
> > + MX6QDL_PAD_SD3_DAT0__SD3_DATA0
> > 0x170F9
> > + MX6QDL_PAD_SD3_DAT1__SD3_DATA1
> > 0x170F9
> > + MX6QDL_PAD_SD3_DAT2__SD3_DATA2
> > 0x170F9
> > + MX6QDL_PAD_SD3_DAT3__SD3_DATA3
> > 0x170F9
> > + MX6QDL_PAD_SD3_DAT4__SD3_DATA4
> > 0x170F9
> > + MX6QDL_PAD_SD3_DAT5__SD3_DATA5
> > 0x170F9
> > + MX6QDL_PAD_SD3_DAT6__SD3_DATA6
> > 0x170F9
> > + MX6QDL_PAD_SD3_DAT7__SD3_DATA7
> > 0x170F9
> > + >;
> > + };
> > + };
> > +
> > + ipu1 {
> > + pinctrl_ipu1_lcdif: ipu1lcdifgrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_
> > CLK 0x61
> > + /* DE */
> > + MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN1
> > 5 0x61
> > + /* HSync */
> > + MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN0
> > 2 0x61
> > + /* VSync */
> > + MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN0
> > 3 0x61
> > + MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DAT
> > A00 0x61
> > + MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DAT
> > A01 0x61
> > + MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DAT
> > A02 0x61
> > + MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DAT
> > A03 0x61
> > + MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DAT
> > A04 0x61
> > + MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DAT
> > A05 0x61
> > + MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DAT
> > A06 0x61
> > + MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DAT
> > A07 0x61
> > + MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DAT
> > A08 0x61
> > + MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DAT
> > A09 0x61
> > + MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DAT
> > A10 0x61
> > + MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DAT
> > A11 0x61
> > + MX6QDL_PAD_EIM_A17__IPU1_DISP1_DAT
> > A12 0x61
> > + MX6QDL_PAD_EIM_A18__IPU1_DISP1_DAT
> > A13 0x61
> > + MX6QDL_PAD_EIM_A19__IPU1_DISP1_DAT
> > A14 0x61
> > + MX6QDL_PAD_EIM_A20__IPU1_DISP1_DAT
> > A15 0x61
> > + MX6QDL_PAD_EIM_A21__IPU1_DISP1_DAT
> > A16 0x61
> > + MX6QDL_PAD_EIM_A22__IPU1_DISP1_DAT
> > A17 0x61
> > + MX6QDL_PAD_EIM_A23__IPU1_DISP1_DAT
> > A18 0x61
> > + MX6QDL_PAD_EIM_A24__IPU1_DISP1_DAT
> > A19 0x61
> > + MX6QDL_PAD_EIM_D31__IPU1_DISP1_DAT
> > A20 0x61
> > + MX6QDL_PAD_EIM_D30__IPU1_DISP1_DAT
> > A21 0x61
> > + MX6QDL_PAD_EIM_D26__IPU1_DISP1_DAT
> > A22 0x61
> > + MX6QDL_PAD_EIM_D27__IPU1_DISP1_DAT
> > A23 0x61
> > + >;
> > + };
> > + pinctrl_cam_mclk: cam_mclk {
> > + fsl,pins = <
> > + /* CAM sys_mclk */
> > + MX6QDL_PAD_NANDF_CS2__CCM_CLKO2
> > 0x00b0
> > + >;
> > + };
> > + pinctrl_ipu1_csi0: ipu1csi0grp { /* parallel
> > camera */
> > + fsl,pins = <
> > + MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_D
> > ATA12ÂÂ0xb0b1
> > + MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_D
> > ATA13ÂÂ0xb0b1
> > + MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_D
> > ATA14ÂÂ0xb0b1
> > + MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_D
> > ATA15ÂÂ0xb0b1
> > + MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_D
> > ATA16ÂÂ0xb0b1
> > + MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_D
> > ATA17ÂÂ0xb0b1
> > + MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_D
> > ATA18ÂÂ0xb0b1
> > + MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_D
> > ATA19ÂÂ0xb0b1
> > + MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_
> > PIXCLK 0xb0b1
> > + MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HS
> > YNCÂÂÂÂ0xb0b1
> > + MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_V
> > SYNCÂÂÂ0xb0b1
> > + >;
> > + };
> > + };
> > +
> > + pwm {
> > + pinctrl_pwm1: pwm1grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_9__PWM1_OUT
> > 0x1b0b1
> > + >;
> > + };
> > + pinctrl_pwm2: pwm2grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_1__PWM2_OUT
> > 0x1b0b1
> > + >;
> > + };
> > + pinctrl_pwm3: pwm3grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_DAT1__PWM3_OUT
> > 0x1b0b1
> > + >;
> > + };
> > + pinctrl_pwm4: pwm4grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_DAT2__PWM4_OUT
> > 0x1b0b1
> > + >;
> > + };
> > + };
> > +
> > + spdif {
> > + pinctrl_spdif: spdifgrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_GPIO_16__SPDIF_INÂÂ0x1b
> > 0b0
> > + MX6QDL_PAD_GPIO_17__SPDIF_OUT
> > 0x1b0b0
> > + >;
> > + };
> > + };
> > +
> > + uart1 {
> > + pinctrl_uart1_dce: uart1-dcegrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DA
> > TA 0x1b0b1
> > + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DA
> > TA 0x1b0b1
> > + >;
> > + };
> > +
> > + /* DTE mode */
> > + pinctrl_uart1_dte: uart1-dtegrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_CSI0_DAT10__UART1_RX_DA
> > TA 0x1b0b1
> > + MX6QDL_PAD_CSI0_DAT11__UART1_TX_DA
> > TA 0x1b0b1
> > + MX6QDL_PAD_EIM_D19__UART1_RTS_B
> > 0x1b0b1
> > + MX6QDL_PAD_EIM_D20__UART1_CTS_B
> > 0x1b0b1
> > + >;
> > + };
> > +
> > + /* Additional DTR, DSR, DCD */
> > + pinctrl_uart1_ctrl: uart1-ctrlgrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_EIM_D23__UART1_DCD_B
> > 0x1b0b0
> > + MX6QDL_PAD_EIM_D24__UART1_DTR_B
> > 0x1b0b0
> > + MX6QDL_PAD_EIM_D25__UART1_DSR_B
> > 0x1b0b0
> > + >;
> > + };
> > + };
> > +
> > + uart2 {
> > + pinctrl_uart2_dce: uart2-dcegrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA
> > 0x1b0b1
> > + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA
> > 0x1b0b1
> > + >;
> > + };
> > +
> > + /* DTE mode */
> > + pinctrl_uart2_dte: uart2grp-dte {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA
> > 0x1b0b1
> > + MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA
> > 0x1b0b1
> > + MX6QDL_PAD_SD4_DAT6__UART2_RTS_B
> > 0x1b0b1
> > + MX6QDL_PAD_SD4_DAT5__UART2_CTS_B
> > 0x1b0b1
> > + >;
> > + };
> > + };
> > +
> > + uart4 {
> > + pinctrl_uart4_dce: uart4-dcegrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL0__UART4_TX_DATA
> > 0x1b0b1
> > + MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA
> > 0x1b0b1
> > + >;
> > + };
> > +
> > + /* DTE mode */
> > + pinctrl_uart4_dte: uart4-dtegrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL0__UART4_RX_DATA
> > 0x1b0b1
> > + MX6QDL_PAD_KEY_ROW0__UART4_TX_DATA
> > 0x1b0b1
> > + >;
> > + };
> > + };
> > +
> > + uart5 {
> > + pinctrl_uart5_dce: uart5-dcegrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA
> > 0x1b0b1
> > + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA
> > 0x1b0b1
> > + >;
> > + };
> > +
> > + /* DTE mode */
> > + pinctrl_uart5_dte: uart5-dtegrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_KEY_COL1__UART5_RX_DATA
> > 0x1b0b1
> > + MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA
> > 0x1b0b1
> > + >;
> > + };
> > + };
> > +
> > + usbh {
> > + pinctrl_regulator_usbh_pwr:
> > gpio_regulator_usbh_pwr {
> > + fsl,pins = <
> > + /* USBH_EN */
> > + MX6QDL_PAD_GPIO_0__GPIO1_IO00
> > PAD_CTRL_PU_22k
> > + >;
> > + };
> > + };
> > +
> > + usbotg {
> > + pinctrl_usbotg: usbotggrp {
> > + fsl,pins = <
> > + MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID
> > 0x17059
> > + >;
> > + };
> > + pinctrl_regulator_usbotg_pwr:
> > gpio_regulator_usbotg_pwr {
> > + fsl,pins = <
> > + /* USBO power en */
> > + MX6QDL_PAD_EIM_D22__GPIO3_IO22
> > PAD_CTRL_PU_22k
> > + >;
> > + };
> > + };
> > +
> > + usdhc {
> > + pinctrl_mmc_cd: gpio_mmc_cd {
> > + fsl,pins = <
> > + Â/* MMC1 CD */
> > + MX6QDL_PAD_DI0_PIN4__GPIO4_IO20
> > 0x000b0
> > + >;
> > + };
> > + pinctrl_sd_cd: gpio_sd_cd {
> > + fsl,pins = <
> > + /* SD1 CD */
> > + MX6QDL_PAD_NANDF_CS1__GPIO6_IO14
> > 0x000b0
> > + >;
> > + };
> > + pinctrl_usdhc1: usdhc1grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD1_CMD__SD1_CMDÂÂÂÂ0x1
> > 7071
> > + MX6QDL_PAD_SD1_CLK__SD1_CLKÂÂÂÂ0x1
> > 0071
> > + MX6QDL_PAD_SD1_DAT0__SD1_DATA0
> > 0x17071
> > + MX6QDL_PAD_SD1_DAT1__SD1_DATA1
> > 0x17071
> > + MX6QDL_PAD_SD1_DAT2__SD1_DATA2
> > 0x17071
> > + MX6QDL_PAD_SD1_DAT3__SD1_DATA3
> > 0x17071
> > + MX6QDL_PAD_NANDF_D0__SD1_DATA4
> > 0x17071
> > + MX6QDL_PAD_NANDF_D1__SD1_DATA5
> > 0x17071
> > + MX6QDL_PAD_NANDF_D2__SD1_DATA6
> > 0x17071
> > + MX6QDL_PAD_NANDF_D3__SD1_DATA7
> > 0x17071
> > + >;
> > + };
> > + pinctrl_usdhc2: usdhc2grp {
> > + fsl,pins = <
> > + MX6QDL_PAD_SD2_CMD__SD2_CMDÂÂÂÂ0x1
> > 7071
> > + MX6QDL_PAD_SD2_CLK__SD2_CLKÂÂÂÂ0x1
> > 0071
> > + MX6QDL_PAD_SD2_DAT0__SD2_DATA0
> > 0x17071
> > + MX6QDL_PAD_SD2_DAT1__SD2_DATA1
> > 0x17071
> > + MX6QDL_PAD_SD2_DAT2__SD2_DATA2
> > 0x17071
> > + MX6QDL_PAD_SD2_DAT3__SD2_DATA3
> > 0x17071
> > + >;
> > + };
> > + };
> > +};
> > +
> > +&ldb {
> > + status = "okay";
> > +};
> > +
> > +&pwm1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_pwm1>;
> > + status = "disabled";
> > +};
> > +
> > +&pwm2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_pwm2>;
> > + status = "disabled";
> > +};
> > +
> > +&pwm3 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_pwm3>;
> > + status = "disabled";
> > +};
> > +
> > +&pwm4 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_pwm4>;
> > + status = "disabled";
> > +};
> > +
> > +&spdif {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_spdif>;
> > + status = "disabled";
> > +};
> > +
> > +&ssi1 {
> > + fsl,mode = "i2s-slave";
> > + status = "okay";
> > +};
> > +
> > +&uart1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
> > + fsl,dte-mode;
> > + fsl,uart-has-rtscts;
> > + status = "disabled";
> > +};
> > +
> > +&uart2 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_uart2_dte>;
> > + fsl,dte-mode;
> > + fsl,uart-has-rtscts;
> > + status = "disabled";
> > +};
> > +
> > +&uart4 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_uart4_dte>;
> > + fsl,dte-mode;
> > + status = "disabled";
> > +};
> > +
> > +&uart5 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_uart5_dte>;
> > + fsl,dte-mode;
> > + status = "disabled";
> > +};
> > +
> > +&usbh1 {
> > + vbus-supply = <&reg_usb_host_vbus>;
> > + status = "disabled";
> > +};
> > +
> > +&usbotg {
> > + vbus-supply = <&reg_usb_otg_vbus>;
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usbotg>;
> > + disable-over-current;
> > + status = "disabled";
> > +};
> > +
> > +/* MMC1 */
> > +&usdhc1 {
> > + label = "MMC1";
>
> This...
>
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
> > + cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
> > + vmmc-supply = <&reg_3p3v>;
> > + bus-width = <8>;
> > + voltage-ranges = <3300 3300>;
> > + status = "disabled";
> > +};
> > +
> > +/* SD1 */
> > +&usdhc2 {
> > + label = "SD1";
>
> ...and this seem not to be specified upstream? (at least not in
> Documentation/devicetree/bindings/mmc/mmc.txt?)
> Not sure about this... Or is label a common convention and hence
> available for all nodes?

Yes, I guess one can put labels anywhere but I also don't see what the
exact purpose of them should be in this case so I will drop them.

> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>;
> > + cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
> > + vmmc-supply = <&reg_3p3v>;
> > + bus-width = <4>;
> > + voltage-ranges = <3300 3300>;
> > + status = "disabled";
> > +};
> > +
> > +/* eMMC */
> > +&usdhc3 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_usdhc3>;
> > + vmmc-supply = <&reg_3p3v>;
> > + bus-width = <8>;
> > + voltage-ranges = <3300 3300>;
> > + non-removable;
> > + status = "okay";
> > +};
> > +
> > +&weim {
> > + status = "disabled"; /* weim signals not accessible on
> > i.MX6 */
>
> They are accessible on the i.MX6 SoC.. but maybe "on Apalis iMX6Q/D".
> Or
> just remove the comment, since that is kind of what disabled says?

Yes, that comment seems bogus and will be dropped.

> > +};
>
> Otherwise:
> Reviewed-by: Stefan Agner <stefan@xxxxxxxx>

Thanks!

> --
> Stefan

Cheers

Marcel