Re: [RFC PATCH v2] Add IPI entry for CPU UP

[Zhaoyang Huang]

On 12 January 2016 at 17:38, Lorenzo Pieralisi
<lorenzo.pieralisi@xxxxxxx> wrote:
> On Tue, Jan 12, 2016 at 10:17:42AM +0800, Zhaoyang Huang wrote:
>> On 12 January 2016 at 10:05, Zhaoyang Huang <zhaoyang.huang@xxxxxxxxxx> wrote:
>> > In some ARM SOCs, IPI interrupt is used for hotplug in one cpu, that is,
>> > sending a IPI to the core in WFI and powerdown status. So Add a IPI
>> > entry for handle this kind of cpu up interrupt
>> > Launching the IPI can be done within PSCI, while there will be one unknown
>> > type of IPI as the dest core come up to the kernel world which will bring a
>> > warning so far.So add such type of IPI to handle the interrupt.
>
> You missed CC'ing ALKML for the second time and you were warned.
>
> You are adding a call to *send* an IPI in the kernel so the commit
> above is misleading.
>
> Acknowledge and clear the IRQ in FW so that the mechanism is completely
> implemented in FW (ie PSCI), that the CPU coming out of reset will run
> before getting to the kernel, this patch is not needed and we already
> explained to you why.
>
> Lorenzo
>
Thanks for clarification. Whereas, I got a kernel warning for an
unknown type of IPI
from the dest core. It seems that the irq is not acked and cleared by
the fw before
kernel.

hint:There is only bl31 for the testing SOC

>> > Signed-off-by: Zhaoyang Huang <zhaoyang.huang@xxxxxxxxxxxxxx>
>> > ---
>> >  arch/arm64/include/asm/hardirq.h |    2 +-
>> >  arch/arm64/kernel/smp.c          |   10 ++++++++++
>> >  2 files changed, 11 insertions(+), 1 deletion(-)
>> >
>> > diff --git a/arch/arm64/include/asm/hardirq.h b/arch/arm64/include/asm/hardirq.h
>> > index a57601f..bb4edb7 100644
>> > --- a/arch/arm64/include/asm/hardirq.h
>> > +++ b/arch/arm64/include/asm/hardirq.h
>> > @@ -20,7 +20,7 @@
>> >  #include <linux/threads.h>
>> >  #include <asm/irq.h>
>> >
>> > -#define NR_IPI 5
>> > +#define NR_IPI   6
>> >
>> >  typedef struct {
>> >         unsigned int __softirq_pending;
>> > diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
>> > index b1adc51..20e63c9 100644
>> > --- a/arch/arm64/kernel/smp.c
>> > +++ b/arch/arm64/kernel/smp.c
>> > @@ -70,6 +70,7 @@ enum ipi_msg_type {
>> >         IPI_CPU_STOP,
>> >         IPI_TIMER,
>> >         IPI_IRQ_WORK,
>> > +       IPI_CPU_UP,
>> >  };
>> >
>> >  /*
>> > @@ -627,6 +628,7 @@ static const char *ipi_types[NR_IPI] __tracepoint_string = {
>> >         S(IPI_CPU_STOP, "CPU stop interrupts"),
>> >         S(IPI_TIMER, "Timer broadcast interrupts"),
>> >         S(IPI_IRQ_WORK, "IRQ work interrupts"),
>> > +       S(IPI_CPU_UP, "Hotplug cpu up by ipi"),
>> >  };
>> >
>> >  static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
>> > @@ -746,6 +748,8 @@ void handle_IPI(int ipinr, struct pt_regs *regs)
>> >                 irq_exit();
>> >                 break;
>> >  #endif
>> > +       case IPI_CPU_UP:
>> > +               break;
>> >
>> >         default:
>> >                 pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
>> > @@ -798,3 +802,9 @@ int setup_profiling_timer(unsigned int multiplier)
>> >  {
>> >         return -EINVAL;
>> >  }
>> > +
>> > +void smp_send_cpuup(int cpu)
>> > +{
>> > +       smp_cross_call(cpumask_of(cpu), IPI_CPU_UP);
>> > +}
>> > +
>> > --
>> > 1.7.9.5
>> >
>> As the added commit message saying, the IPI can be launched in either
>> of kernel or PSCI. But there will be a unknown type of IPI when dest
>> core come to the kernel.
>>