Re: [PATCH] net: macb: clear interrupts when disabling them

[Nicolas Ferre]

Le 14/01/2016 20:27, Nathan Sullivan a écrit :
> Disabling interrupts with the IDR register does not stop the macb hardware
> from asserting its interrupt line if there are interrupts pending.  Always
> clear the interrupts using ISR, and be sure to write it on hardware that
> is not read-to-clear, like Zynq.  Not doing so will cause interrupts when
> the driver doesn't expect them.
> 
> Signed-off-by: Nathan Sullivan <nathan.sullivan@xxxxxx>

It seems okay:
Acked-by: Nicolas Ferre <nicolas.ferre@xxxxxxxxx>

> ---
>  drivers/net/ethernet/cadence/macb.c |    4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
> index c563475..9d9984a 100644
> --- a/drivers/net/ethernet/cadence/macb.c
> +++ b/drivers/net/ethernet/cadence/macb.c
> @@ -1040,6 +1040,8 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id)
>  		/* close possible race with dev_close */
>  		if (unlikely(!netif_running(dev))) {
>  			queue_writel(queue, IDR, -1);
> +			if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
> +				queue_writel(queue, ISR, -1);
>  			break;
>  		}
>  
> @@ -1561,6 +1563,8 @@ static void macb_reset_hw(struct macb *bp)
>  	for (q = 0, queue = bp->queues; q < bp->num_queues; ++q, ++queue) {
>  		queue_writel(queue, IDR, -1);
>  		queue_readl(queue, ISR);
> +		if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
> +			queue_writel(queue, ISR, -1);
>  	}
>  }
>  
> 


-- 
Nicolas Ferre