Re: [RFC][PATCH] mips: Fix arch_spin_unlock()

[Will Deacon]

Hi Paul,

On Thu, Jan 28, 2016 at 02:31:31PM -0800, Paul E. McKenney wrote:
> On Thu, Jan 28, 2016 at 09:57:19AM +0000, Will Deacon wrote:
> > On Wed, Jan 27, 2016 at 03:38:36PM -0800, Paul E. McKenney wrote:
> > > On Wed, Jan 27, 2016 at 03:21:58PM +0000, Will Deacon wrote:
> > Yes, sorry for the shorthand:
> > 
> >   - Each paragraph is a separate thread
> >   - Wx=1 means WRITE_ONCE(x, 1), Rx=1 means READ_ONCE(x) returns 1
> >   - WxRel means smp_store_release(x,1), RxAcq=1 means smp_load_acquire(x)
> >     returns 1
> >   - Everything is initially zero
> > 
> > > > and I suppose a variant of that:
> > > > 
> > > > 
> > > > Wx=1
> > > > WyRel=1
> > > > 
> > > > RyAcq=1
> > > > Wz=1
> > > > 
> > > > Rz=1
> > > > <address dependency>
> > > > Rx=0
> > > 
> > > Agreed, this would be needed as well, along with the read-read and
> > > read-write variants.  I picked the write-read version (Will's first
> > > test above) because write-read reordering is the most likely on
> > > hardware that I am aware of.
> > 
> > Question: if you replaced "Wz=1" with "WzRel=1" in my second test, would
> > it then be forbidden?
> 
> On Power, yes.  I would guess on ARM as well.

Indeed.

> For Linux in general, this is a question: How strict do we want to be
> about matching the type of write with the corresponding read?  My
> default approach is to initially be quite strict and loosen as needed.
> Here "quite strict" might mean requiring an rcu_assign_pointer() for
> the write and rcu_dereference() for the read, as opposed to (say)
> ACCESS_ONCE() for the read.  (I am guessing that this would be too
> tight, but it makes a good example.)
> 
> Thoughts?

That sounds broadly sensible to me and allows rcu_assign_pointer and
rcu_dereference to be used as drop-in replacements for release/acquire
where local transitivity isn't required. However, I don't think we can
rule out READ_ONCE/WRITE_ONCE interactions as they seem to be used
already in things like the osq_lock (albeit without the address
dependency).

Will