On 25/01/16 17:29, Andrew F. Davis wrote:
+hmm. Can you do this on the stack? Don't think so but maybe I'm wrong..
+static int afe4403_read(struct afe4403_data *afe, unsigned int reg, u32 *val)
+{
+ u8 tx[4] ____cacheline_aligned = {AFE440X_CONTROL0, 0x0, 0x0,
+ AFE440X_CONTROL0_READ};
The cachline aligned trick relies on the start of the allocation on the
heap being aligned and then pads to ensure that the element so tagged
is also aligned appropriately.
+ u8 rx[3];Even if this were possible, ret is in the same cacheline as tx and rx so
+ int ret;
chaos may well occur.
If you really want to avoid having allocations elsewhere, just use
spi_write_then_read(afe->spi, tx, 4, NULL, 0) and you should be fine
as spi_write_then_read uses safe bounce buffers.