Re: [PATCH v6] SATA: OCTEON: support SATA on OCTEON platform

[Zubair Lutfullah Kakakhel]

Hi,

On 03/02/16 13:47, Arnd Bergmann wrote:
> On Wednesday 03 February 2016 13:24:10 Zubair Lutfullah Kakakhel wrote:
> > > Typically we treat those special registers as part of the device itself
> > > and have a single device node for the AHCI controller and that one.
> > >
> > > What is your reason for doing it differently here?
> >
> > Two reasons
> >
> > 1- The hardware is like a proper split rather than additional hidden registers in
> > the same memory space.
> >
> > 2- Tons of devices in the field have the following DT node built in the bootloader.
> >
> >                  uctl@118006c000000 {
> >                          compatible = "cavium,octeon-7130-sata-uctl";
> >                          reg = <0x11800 0x6c000000 0x0 0x100>;
> >                          ...
> >                           sata: sata@16c0000000000 {
> >                                   compatible = "cavium,octeon-7130-ahci";
> >                                   reg = <0x16c00 0x00000000 0x0 0x200>;
> >                                  ...
> >                           };
> >                  };
> >
> > The patch suggests a way to handle this.
>
> Ok, fair enough. Also, you write in the binding that this is a bus
> bridge, so this indeed matches what the hardware does, and that's ok.

Thank-you.

> Does the bus bridge actually translate the entire 64-bit CPU MMIO space,
> or is it possible that it only handles one device (or a couple of
> them) with a fairly limited space?

This uctl is just for SATA devices.

> Maybe it's better to represent it as a #address-cells=<1> in the
> example, and have the child device appear at address 0 in there.

Possible in the example.

I'll update the example to

	uctl@118006c000000 {
		compatible = "cavium,octeon-7130-sata-uctl";
		reg = <0x11800 0x6c000000 0x0 0x100>;
		ranges; /* Direct mapping */
		dma-ranges;
		#address-cells = <1>;
		#size-cells = <2>;

		sata: sata@0 {
			compatible = "cavium,octeon-7130-ahci";
			reg = <0x16c00 0x00000000 0x0 0x200>;
			interrupt-parent = <&cibsata>;
			interrupts = <2 4>; /* Bit: 2, level */
		};
	};

> For the machines that already ship a DT, that would not matter though,
> it works either way.
>
> 	Arnd