* PGP Signed by an unknown key > > On Tue, Feb 23, 2016 at 03:25:54PM +0900, Alexandre Courbot wrote:>> The default DMA mask covers a 32 bits address range, but tegradrm >> can address more than that. Set the DMA mask to the actual >> addressable range to avoid the use of unneeded bounce buffers. >> >> Signed-off-by: Alexandre Courbot <acourbot@xxxxxxxxxx> --- Thierry, >> I am not absolutely sure whether the size is correct and applies to >> all Tegra generations - please let me know if this needs to be >> reworked. >> >> drivers/gpu/drm/tegra/drm.c | 1 + 1 file changed, 1 insertion(+) > > This kind of depends on whether or not the device is behind an IOMMU. > If it is, then the IOMMU DMA MASK would apply, which can be derived > from the number of address bits that the IOMMU can handle. The SMMU > supports 32 address bits on Tegra30 and Tegra114, 34 address bits on > more recent generations. > > I think for now it's safer to leave the DMA mask at the default (32 > bit) to avoid the need to distinguish between IOMMU and non-IOMMU > devices.