RE: [PATCH net] r8169:Remove unnecessary phy reset for pcie nic when setting link spped.

[Hau]

[...] 
> Can you clarify:
> - actually this patch does not care about the link at all. So when there's
>   link no phy reset is needed either, right ?
> - does "this" in "to do this" means that
>   1. phy reset prevents phy from auto speed down
>   2. avoiding phy reset prevents phy from auto speed down
>   I would expect 1. from the rtl_wol_pll_power_down + rtl_speed_down +
>   rtl8169_set_speed combo (i.e. we want the driver to allow auto speed
> down)
>   but it's a bit ambiguous.

Unless pcie nic has bug, pcie nic does not need to reset phy to let phy link on.

There is a counter for phy speed down. If phy is in link down state, this counter will start to count down. When it count to 0, phy will speed down. Reset phy will reset this counter and prevent phy from speed down.

 ------Please consider the environment before printing this e-mail.