Re: [PATCH 0/2] perf/x86/msr: Add some new AMD performance event counters

[Huang Rui]

On Fri, Jan 29, 2016 at 04:29:55PM +0800, Huang Rui wrote:
> Hi all,
> 
> This serials of patches add two event counters that are PTSC
> (performance time-stamp counter) and IRperf (instructions retired
> count) for AMD new processors. They are incicated by
> CPUID.8000_0001H:ECX[27] and CPUID.8000_0008H:EBX[1] separately.
> 
> Thanks,
> Rui
> 
> Huang Rui (2):
>   perf/x86/msr: Add AMD performance time-stamp counter support
>   perf/x86/msr: Add AMD instructions retired performance counter
> 
>  arch/x86/include/asm/cpufeature.h    |  2 ++
>  arch/x86/include/asm/msr-index.h     |  4 ++++
>  arch/x86/kernel/cpu/perf_event_msr.c | 36 ++++++++++++++++++++++++++----------
>  3 files changed, 32 insertions(+), 10 deletions(-)
> 

Hi Ingo, Peter, Boris,

Can you apply these two patches since I sent two months before. Need I
rebase them?

Thanks,
Rui