Re: [PATCH] regmap: mmio: Fix value endianness selection

From: Alexander Stein
Date: Wed Mar 23 2016 - 10:21:01 EST


On Wednesday 23 March 2016 13:17:59, Mark Brown wrote:
> Currently when selecting value endianness we check the register
> endiannes, not the value endianness.
>
> Reported-by: Alexander Stein <alexander.stein@xxxxxxxxxxxxxxxxxxxxx>
> Signed-off-by: Mark Brown <broonie@xxxxxxxxxx>

Mh, while this _does_ fix the problem regarding accessing SCFG peripheral
using syscon, it _does not_ fix the access for spi-fsl-dspi, this is still
using little-endian.
The difference in those drivers is that syscon manually sets
config.val_format_endian before calling regmap_init_mmio.
spi-fsl-dspi does not. I guess this driver relies on this configuration being
done in regmap_get_val_endian. But this is never reached because after setting
map->reg_read this code is skipped due to "goto skip_format_initialization;"
IMHO a call to regmap_get_val_endian should be added to
regmap_mmio_gen_context.

Best regards,
Alexander