Re: [PATCH V3 0/5] clk: support clocks which requires parent clock on during operation

From: Dong Aisheng
Date: Thu Mar 31 2016 - 09:51:43 EST

Hi Fabio,

On Thu, Mar 31, 2016 at 12:00 AM, Fabio Estevam <festevam@xxxxxxxxx> wrote:
> Hi Dong,
> On Tue, Jul 28, 2015 at 10:19 AM, Dong Aisheng
> <aisheng.dong@xxxxxxxxxxxxx> wrote:
>> This patch series adds support in clock framework for clocks which operations
>> requires its parent clock is on.
>> Such clock type is initially met on Freescale i.MX7D platform that all clocks
>> operations, including enable/disable, rate change and re-parent, requires its
>> parent clock on. No sure if any other SoC has the similar clock type.
>> Current clock core can not support such type of clock well.
>> This patch introduce a new flag CLK_SET_PARENT_ON to handle this special case
>> in clock core that enable its parent clock firstly for each operation and disable
>> it later after operation complete.
>> The most special case is for set_parent() operation which requires both parent,
>> old one and new one, to be enabled at the same time during the operation.
>> The patch series is based on for-next branch of Michael's git:
>> git://
> Do you plan to resend this series?

It is in my TODO list.
I'm currently busy with some other items.
Will be able to do it in a few days.

Dong Aisheng

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