Re: [PATCH v2] ARM: dts: dra7: Correct clock tree for sys_32k_ck

[Tero Kristo]

On 04/01/2016 06:36 PM, Tony Lindgren wrote:
> Hi,
>
> * Tony Lindgren <tony@xxxxxxxxxxx> [160331 10:04]:
> > * Keerthy <a0393675@xxxxxx> [160331 02:26]:
> > > On Thursday 31 March 2016 12:00 PM, Tero Kristo wrote:
> > > > On 03/31/2016 12:32 AM, Tony Lindgren wrote:
> > > > > * Tony Lindgren <tony@xxxxxxxxxxx> [160330 14:19]:
> > > > > > * Keerthy <j-keerthy@xxxxxx> [160314 05:04]:
> > > > > > > This is w.r.t J6/J6eco: 32clk is pseudo (erratum i856) - clock source.
> > > > > > > Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz
> > > > > > > external
> > > > > > > crystal is not enabled at power up. Instead the CPU falls back to using
> > > > > > > an emulation for the 32KHz clock which is SYSCLK1/610.  SYSCLK1 is
> > > > > > > usually
> > > > > > > 20MHz on boards so far (which gives an emulated frequency of 32.786KHz)
> > > > > >
> > > > > > Thanks applying into omap-for-v4.6/fixes.
> > > > >
> > > > > Actually let's wait a review from Tero on this one, not sure
> > > > > about the pseudo clock naming here. So dropping for now.
> > > >
> > > > The patch is fine for me, I didn't comment anything before as I thought
> > > > you already applied it.
> > > >
> > > > Acked-by: Tero Kristo <t-kristo@xxxxxx>
> > >
> > > Thanks Tero.
> >
> > OK applying with Tero's ack.
>
> I'm dropping this again as it introduces new warnings with make dtbs:
>
> Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
>    DTC     arch/arm/boot/dts/am57xx-cl-som-am57x.dtb
> Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
>    DTC     arch/arm/boot/dts/am57xx-sbc-am57x.dtb
> Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
>    DTC     arch/arm/boot/dts/dra7-evm.dtb
> Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
>    DTC     arch/arm/boot/dts/dra72-evm.dtb
> Warning (reg_format): "reg" property in /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck has invalid length (4 bytes) (#address-cells == 2, #size-cells == 1)
> Warning (avoid_default_addr_size): Relying on default #address-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
> Warning (avoid_default_addr_size): Relying on default #size-cells value for /ocp/l4@4a000000/cm_core@8000/clockdomains/sys_32k_ck
>
> Regards,
>
> Tony

Looks like a merge conflict to me, sys_32k_ck has gone under 
clockdomains for some reason. It should be under clocks.

-Tero