Re: [tip:perf/core] perf/core: Verify we have a single perf_hw_context PMU
From: Peter Zijlstra
Date: Mon Apr 04 2016 - 10:02:18 EST
On Thu, Mar 31, 2016 at 02:23:20AM -0700, tip-bot for Peter Zijlstra wrote:
> Commit-ID: 26657848502b78474a5f17f9ce2ae6dc8d8d6262
> Gitweb: http://git.kernel.org/tip/26657848502b78474a5f17f9ce2ae6dc8d8d6262
> Author: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
> AuthorDate: Tue, 22 Mar 2016 22:09:18 +0100
> Committer: Ingo Molnar <mingo@xxxxxxxxxx>
> CommitDate: Thu, 31 Mar 2016 10:30:41 +0200
>
> perf/core: Verify we have a single perf_hw_context PMU
>
> There should (and can) only be a single PMU for perf_hw_context
> events.
>
> This is because of how we schedule events: once a hardware event fails to
> schedule (the PMU is 'full') we stop trying to add more. The trivial
> 'fix' would break the Round-Robin scheduling we do.
This triggered on AMD machines..
---
Subject: perf,amd: Do not register a task ctx for uncore PMUs
Uncore PMUs are per node, they cannot have per-task counters.
Reported-by: Borislav Petkov <bp@xxxxxxx>
Reported-by: Ingo Molnar <mingo@xxxxxxxxxx>
Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
---
arch/x86/events/amd/uncore.c | 2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/x86/events/amd/uncore.c b/arch/x86/events/amd/uncore.c
index 3db9569..98ac573 100644
--- a/arch/x86/events/amd/uncore.c
+++ b/arch/x86/events/amd/uncore.c
@@ -263,6 +263,7 @@ static const struct attribute_group *amd_uncore_attr_groups[] = {
};
static struct pmu amd_nb_pmu = {
+ .task_ctx_nr = perf_invalid_context,
.attr_groups = amd_uncore_attr_groups,
.name = "amd_nb",
.event_init = amd_uncore_event_init,
@@ -274,6 +275,7 @@ static struct pmu amd_nb_pmu = {
};
static struct pmu amd_l2_pmu = {
+ .task_ctx_nr = perf_invalid_context,
.attr_groups = amd_uncore_attr_groups,
.name = "amd_l2",
.event_init = amd_uncore_event_init,