Re: [PATCH v4 0/2] Skylake PSys support

[Rafael J. Wysocki]

On Wed, Apr 20, 2016 at 8:28 PM, Srinivas Pandruvada
<srinivas.pandruvada@xxxxxxxxxxxxxxx> wrote:
> On Wed, 2016-04-20 at 15:59 +0200, Peter Zijlstra wrote:
>> On Sun, Apr 17, 2016 at 03:02:59PM -0700, Srinivas Pandruvada wrote:
>> >
>> > Skylake processor supports a new set of RAPL registers for
>> > controlling
>> > entire SoC instead of just CPU package called PSys. This change
>> > adds
>> > support in two sub systems:
>> >
>> > x86/perf: Adds basic support for Skylake RAPL and PSys support
>> >
>> > powercap/rapl: A new platform domain to the current power capping
>> > Intel
>> > RAPL driver.
>> >
>> > Srinivas Pandruvada (2):
>> >   perf/x86/intel/rapl: support Skylake RAPL domains
>> >   powercap: intel_rapl: PSys support
>> >
>> >  arch/x86/events/intel/rapl.c     | 51 +++++++++++++++++++++++++++-
>> > -
>> >  arch/x86/include/asm/msr-index.h |  2 ++
>> >  drivers/powercap/intel_rapl.c    | 69
>> > ++++++++++++++++++++++++++++++++++++++++
>> >  3 files changed, 120 insertions(+), 2 deletions(-)
>> These two patches depend on one another, right?
> Yes.
>> Because the first patch
>> adds the MSR the second patch uses?
>>
>> How should we go about merging this? The perf-rapl stuff normally
>> goes
>> through tip while the powercap stuff goes through Rafael's tree.
> Do you want me to only send PERF patch and wait for this to be merged
> before sending powercap?

You can send both and they both can go in via tip as far as I'm concerned.