Re: [PATCH 1/2] dt-bindings: pci: add DT binding for Axis ARTPEC-6 PCIe controller

From: Rob Herring
Date: Thu May 05 2016 - 18:03:41 EST


On Wed, May 04, 2016 at 01:54:17PM +0200, Niklas Cassel wrote:
> From: Niklas Cassel <niklas.cassel@xxxxxxxx>
>
> This commit adds the Device Tree binding documentation that allows to
> describe the PCIe controller found in the Axis ARTPEC-6 SoC.
>
> Signed-off-by: Niklas Cassel <niklas.cassel@xxxxxxxx>
> ---
> .../devicetree/bindings/pci/axis,artpec6-pcie.txt | 45 ++++++++++++++++++++++
> 1 file changed, 45 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
>
> diff --git a/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
> new file mode 100644
> index 0000000..fdac2a2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/axis,artpec6-pcie.txt
> @@ -0,0 +1,45 @@
> +* Axis ARTPEC-6 PCIe interface
> +
> +This PCIe host controller is based on the Synopsis Designware PCIe IP
> +and thus inherits all the common properties defined in designware-pcie.txt.
> +
> +Required properties:
> +- compatible: "axis,artpec6-pcie", "snps,dw-pcie"
> +- reg: base addresses and lengths of the pcie controller (DBI),
> + the phy controller, and configuration address space.
> +- reg-names: Must include the following entries:
> + - "dbi"
> + - "phy"
> + - "config"
> +- interrupts: A list of interrupt outputs of the controller. Must contain an
> + entry for each entry in the interrupt-names property.
> +- interrupt-names: Must include the following entries:
> + - "msi": The interrupt that is asserted when an MSI is received
> +- syscon: Should contain a link to the syscon device node.

What is the syscon for? Perhaps a name that reflects the purpose.

Rob