Re: [PATCH v2] clk: ingenic: Allow divider value to be divided

[Stephen Boyd]

On 05/09, Harvey Hunt wrote:
> The JZ4780's MSC clock divider registers multiply the clock divider by 2.
> This means that MMC devices run at half their expected speed. Add the
> ability to divide the clock divider in order to solve this.
> 
> Signed-off-by: Harvey Hunt <harvey.hunt@xxxxxxxxxx>
> 
> Cc: Paul Burton <paul.burton@xxxxxxxxxx>
> Cc: Ralf Baechle <ralf@xxxxxxxxxxxxxx> 
> Cc: linux-clk@xxxxxxxxxxxxxxx 
> Cc: linux-kernel@xxxxxxxxxxxxxxx 
> ---

Applied to clk-next

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