Re: [PATCH v1 2/2] dmaengine: rename cmd_pause to cmd_suspend

[Andy Shevchenko]

On Tue, 2016-05-10 at 21:29 +0530, Vinod Koul wrote:
> On Wed, May 04, 2016 at 10:29:40PM +0300, Andy Shevchenko wrote:
> > 
> > Rename cmd_pause to cmd_suspend to be clear that latter capability
> > reflects
> > pause AND resume.
> How does cmd_suspend be any clearer to reflect that channel is paused
> and
> not. One can argue this might be related to power management suspend 

Okay, I'm open to suggestions. My main point that name should not
represent only pause or resume, rather both.

> ...
> 
> > 
> > 
> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
> > ---
> > Âdrivers/dma/dmaengine.cÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ| 4 ++--
> > Âdrivers/tty/serial/8250/8250_dma.cÂÂÂÂ| 2 +-
> > Âinclude/linux/dmaengine.hÂÂÂÂÂÂÂÂÂÂÂÂÂ| 4 ++--
> > Âsound/soc/soc-generic-dmaengine-pcm.c | 2 +-
> > Â4 files changed, 6 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/dma/dmaengine.c b/drivers/dma/dmaengine.c
> > index 59eb4fa..e9917a4 100644
> > --- a/drivers/dma/dmaengine.c
> > +++ b/drivers/dma/dmaengine.c
> > @@ -503,9 +503,9 @@ int dma_get_slave_caps(struct dma_chan *chan,
> > struct dma_slave_caps *caps)
> > Â
> > Â	/*
> > Â	Â* Some devices implement only pause (e.g. to get residuum)
> > but no
> > -	Â* resume. However cmd_pause is advertised as pause AND
> > resume.
> > +	Â* resume. However cmd_suspend is advertised as pause AND
> > resume.
> > Â	Â*/
> > -	caps->cmd_pause = !!(device->device_pause && device-
> > >device_resume);
> > +	caps->cmd_suspend = !!(device->device_pause && device-
> > >device_resume);
> > Â	caps->cmd_terminate = !!device->device_terminate_all;
> > Â
> > Â	return 0;
> > diff --git a/drivers/tty/serial/8250/8250_dma.c
> > b/drivers/tty/serial/8250/8250_dma.c
> > index 8ccbf53..2db57b0 100644
> > --- a/drivers/tty/serial/8250/8250_dma.c
> > +++ b/drivers/tty/serial/8250/8250_dma.c
> > @@ -180,7 +180,7 @@ int serial8250_request_dma(struct uart_8250_port
> > *p)
> > Â	ret = dma_get_slave_caps(dma->rxchan, &caps);
> > Â	if (ret)
> > Â		goto release_rx;
> > -	if (!caps.cmd_pause || !caps.cmd_terminate ||
> > +	if (!caps.cmd_suspend || !caps.cmd_terminate ||
> > Â	ÂÂÂÂcaps.residue_granularity ==
> > DMA_RESIDUE_GRANULARITY_DESCRIPTOR) {
> > Â		ret = -EINVAL;
> > Â		goto release_rx;
> > diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
> > index 30de019..af9c97c 100644
> > --- a/include/linux/dmaengine.h
> > +++ b/include/linux/dmaengine.h
> > @@ -402,7 +402,7 @@ enum dma_residue_granularity {
> > Â *Â	type of direction, the dma controller should fill (1 <<
> > <TYPE>) and same
> > Â *Â	should be checked by controller as well
> > Â * @max_burst: max burst capability per-transfer
> > - * @cmd_pause: true, if pause and thereby resume is supported
> > + * @cmd_suspend: true, if pause and thereby resume is supported
> > Â * @cmd_terminate: true, if terminate cmd is supported
> > Â * @residue_granularity: granularity of the reported transfer
> > residue
> > Â * @descriptor_reuse: if a descriptor can be reused by client and
> > @@ -413,7 +413,7 @@ struct dma_slave_caps {
> > Â	u32 dst_addr_widths;
> > Â	u32 directions;
> > Â	u32 max_burst;
> > -	bool cmd_pause;
> > +	bool cmd_suspend;
> > Â	bool cmd_terminate;
> > Â	enum dma_residue_granularity residue_granularity;
> > Â	bool descriptor_reuse;
> > diff --git a/sound/soc/soc-generic-dmaengine-pcm.c b/sound/soc/soc-
> > generic-dmaengine-pcm.c
> > index 6cef397..73fc20e 100644
> > --- a/sound/soc/soc-generic-dmaengine-pcm.c
> > +++ b/sound/soc/soc-generic-dmaengine-pcm.c
> > @@ -151,7 +151,7 @@ static int
> > dmaengine_pcm_set_runtime_hwparams(struct snd_pcm_substream
> > *substrea
> > Â
> > Â	ret = dma_get_slave_caps(chan, &dma_caps);
> > Â	if (ret == 0) {
> > -		if (dma_caps.cmd_pause)
> > +		if (dma_caps.cmd_suspend)
> > Â			hw.info |= SNDRV_PCM_INFO_PAUSE |
> > SNDRV_PCM_INFO_RESUME;
> > Â		if (dma_caps.residue_granularity <=
> > DMA_RESIDUE_GRANULARITY_SEGMENT)
> > Â			hw.info |= SNDRV_PCM_INFO_BATCH;
> > --Â
> > 2.8.1
> > 

-- 
Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
Intel Finland Oy