[PATCH 5/8] perf/x86/intel: Use new topology_max_smt_threads() in HT leak workaround
From: Andi Kleen
Date: Thu May 19 2016 - 20:12:13 EST
From: Andi Kleen <ak@xxxxxxxxxxxxxxx>
Now that we have topology_max_smt_threads() use it
to detect the HT workarounds for older CPUs.
v2: Use topology_max_smt_threads()
Signed-off-by: Andi Kleen <ak@xxxxxxxxxxxxxxx>
---
arch/x86/events/intel/core.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index b337ad7db2b2..12b438435999 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3991,16 +3991,14 @@ __init int intel_pmu_init(void)
*/
static __init int fixup_ht_bug(void)
{
- int cpu = smp_processor_id();
- int w, c;
+ int c;
/*
* problem not present on this CPU model, nothing to do
*/
if (!(x86_pmu.flags & PMU_FL_EXCL_ENABLED))
return 0;
- w = cpumask_weight(topology_sibling_cpumask(cpu));
- if (w > 1) {
+ if (topology_max_smt_threads() > 1) {
pr_info("PMU erratum BJ122, BV98, HSD29 worked around, HT is on\n");
return 0;
}
--
2.5.5