Re: [PATCH 4/5] iommu/rockchip: add ARM64 cache flush operation for iommu

From: Robin Murphy
Date: Mon May 23 2016 - 06:44:32 EST


On 23/05/16 02:37, Shunqian Zheng wrote:
From: Simon <xxm@xxxxxxxxxxxxxx>

Signed-off-by: Simon <xxm@xxxxxxxxxxxxxx>
---
drivers/iommu/rockchip-iommu.c | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 043d18c..1741b65 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -95,12 +95,16 @@ struct rk_iommu {

static inline void rk_table_flush(u32 *va, unsigned int count)
{
+#if defined(CONFIG_ARM)
phys_addr_t pa_start = virt_to_phys(va);
phys_addr_t pa_end = virt_to_phys(va + count);
size_t size = pa_end - pa_start;

__cpuc_flush_dcache_area(va, size);
outer_flush_range(pa_start, pa_end);
+#elif defined(CONFIG_ARM64)
+ __dma_flush_range(va, va + count);
+#endif

Ugh, please don't use arch-private cache maintenance functions directly from a driver. Allocating/mapping page tables to be read by the IOMMU is still DMA, so using the DMA APIs is the correct way to manage them, *especially* if it needs to work across multiple architectures.

Robin.

}

static struct rk_iommu_domain *to_rk_domain(struct iommu_domain *dom)