Re: [PATCH 2/2] pci: Add PCIe driver for Rockchip Soc

[Shawn Lin]

Hi Bharat,

On 2016/5/23 23:15, Bharat Kumar Gogada wrote:
> > +
> > +	irq = platform_get_irq_byname(pdev, "pcie-sys");
> > +	if (irq < 0) {
> > +		dev_err(dev, "missing pcie_sys IRQ resource\n");
> > +		return -EINVAL;
> > +	}
> > +	err = devm_request_irq(dev, irq, rockchip_pcie_subsys_irq_handler,
> > +			       IRQF_SHARED, "pcie-sys", port);
> > +	if (err) {
> > +		dev_err(dev, "failed to request pcie subsystem irq\n");
> > +		return err;
> > +	}
> > +
> > +	port->irq = platform_get_irq_byname(pdev, "pcie-legacy");
> > +	if (port->irq < 0) {
> > +		dev_err(dev, "missing pcie_legacy IRQ resource\n");
> > +		return -EINVAL;
> > +	}
> > +	err = devm_request_irq(dev, port->irq,
> > +			       rockchip_pcie_legacy_int_handler,
> > +			       IRQF_SHARED,
> > +			       "pcie-legacy",
> > +			       port);
> > +	if (err) {
> > +		dev_err(&pdev->dev, "failed to request pcie-legacy irq\n");
> > +		return err;
> > +	}
> > +
> > +	irq = platform_get_irq_byname(pdev, "pcie-client");
> > +	if (irq < 0) {
> > +		dev_err(dev, "missing pcie-client IRQ resource\n");
> > +		return -EINVAL;
> > +	}
> > +	err = devm_request_irq(dev, irq, rockchip_pcie_client_irq_handler,
> > +			       IRQF_SHARED, "pcie-client", port);
> > +	if (err) {
> > +		dev_err(dev, "failed to request pcie client irq\n");
> > +		return err;
> > +	}
> > +
>
> All of the above interrupt number details are being obtained from device tree, why not move above API's to rockchip_pcie_parse_dt.

Ok, I will move these above into parse_dt function.

> > +	port->dev = dev;
> > +	err = rockchip_pcie_parse_dt(port);
> > +	if (err) {
> > +		dev_err(dev, "Parsing DT failed\n");
> > +		return err;
> > +	}
> > +
> > +	pcie_write(port, 0x6040000, PCIE_RC_CONFIG_BASE + 0x8);
> > +	pcie_write(port, 0x0, PCIE_CORE_CTRL_MGMT_BASE + 0x300);
> > +
> > +	pcie_write(port, (RC_REGION_0_ADDR_TRANS_L +
> > RC_REGION_0_PASS_BITS),
> > +		   PCIE_CORE_AXI_CONF_BASE);
> > +	pcie_write(port, RC_REGION_0_ADDR_TRANS_H,
> > +		   PCIE_CORE_AXI_CONF_BASE + 0x4);
> > +	pcie_write(port, 0x0080000a, PCIE_CORE_AXI_CONF_BASE + 0x8);
> > +	pcie_write(port, 0x00000000, PCIE_CORE_AXI_CONF_BASE + 0xc);
>
> Why not move the above steps to rockchip_pcie_init_port function ?
> Please use macros instead of using values.

okay, will improve them.

Thanks for comment.

>


--
Best Regards
Shawn Lin