Since TILE doesn't do read speculation, its control dependencies also
guarantee LOAD->LOAD order and we don't need the additional RMB
otherwise required to provide ACQUIRE semantics.
Cc: Chris Metcalf<cmetcalf@xxxxxxxxxxxx>
Signed-off-by: Peter Zijlstra (Intel)<peterz@xxxxxxxxxxxxx>
---
arch/tile/include/asm/barrier.h | 7 +++++++
1 file changed, 7 insertions(+)