Re: [PATCH v5 08/11] powerpc/powernv: Add platform support for stop instruction
From: Michael Neuling
Date: Wed Jun 08 2016 - 18:22:50 EST
On Wed, 2016-06-08 at 22:31 +0530, Shreyas B Prabhu wrote:
> Hi Ben,
>
> Sorry for the delayed response.
>
> On 06/06/2016 03:58 AM, Benjamin Herrenschmidt wrote:
> >
> > On Thu, 2016-06-02 at 07:38 -0500, Shreyas B. Prabhu wrote:
> > >
> > > @@ -61,8 +72,13 @@ save_sprs_to_stack:
> > > ÂÂÂÂÂÂÂÂÂ* Note all register i.e per-core, per-subcore or per-thread
> > > is saved
> > > ÂÂÂÂÂÂÂÂÂ* here since any thread in the core might wake up first
> > > ÂÂÂÂÂÂÂÂÂ*/
> > > +BEGIN_FTR_SECTION
> > > +ÂÂÂÂÂÂÂmfsprÂÂÂr3,SPRN_PTCR
> > > +ÂÂÂÂÂÂÂstdÂÂÂÂÂr3,_PTCR(r1)
> > > +FTR_SECTION_ELSE
> > > ÂÂÂÂÂÂÂÂmfsprÂÂÂr3,SPRN_SDR1
> > > ÂÂÂÂÂÂÂÂstdÂÂÂÂÂr3,_SDR1(r1)
> > > +ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_300)
> > This is the only new SPR we care about in P9 ?
> >
> After reviewing ISA again, I've identified LMRR, LMSER and ASDR also
> need to be restored. I've fixed this in v6.
LMRR and LMSER are used the load monitored patch set. ÂThere they will get
restored when we context switch back to userspace. ÂIt probably doesn't
hurt that much but you don't need to restore them here.Â
They are not used in the kernel.
It escapes me what ASDR is right now.
Mikey