[PATCH 4.2.y-ckt 021/206] drm/i915/dsi: fix CHV dsi encoder hardware state readout on port C

[Kamal Mostafa]

4.2.8-ckt12 -stable review patch.  If anyone has any objections, please let me know.

---8<------------------------------------------------------------

From: Jani Nikula <jani.nikula@xxxxxxxxx>

commit e6f577893d0a4c1f62585bc426ab32d88593d7da upstream.

Due to "some hardware limitation" the DPI enable bit in port C control
register does not get set on VLV. As a workaround we check the status in
pipe B conf register instead. The workaround was added in

commit c0beefd29fcb1ca998f0f9ba41be8539f8eeba9b
Author: Gaurav K Singh <gaurav.k.singh@xxxxxxxxx>
Date:   Tue Dec 9 10:59:20 2014 +0530

    drm/i915: Software workaround for getting the HW status of DSI Port C on BYT

Empirical evidence (on Surface 3 with DSI on port C per VBT) shows that
this is the case also on CHV, so extend the workaround to CHV. We still
have the device ready register check in place, so this should not get
confused with e.g. HDMI on pipe B.

This fixes a number of state checker warnings on CHV DSI port C.

Reviewed-by: Ville SyrjÃlà <ville.syrjala@xxxxxxxxxxxxxxx>
Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
Link: http://patchwork.freedesktop.org/patch/msgid/1460724451-13810-1-git-send-email-jani.nikula@xxxxxxxxx
[ kamal: backport to 4.2-stable: context ]
Signed-off-by: Kamal Mostafa <kamal@xxxxxxxxxxxxx>
---
 drivers/gpu/drm/i915/intel_dsi.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 68b25dd..d03690e 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -600,12 +600,12 @@ static bool intel_dsi_get_hw_state(struct intel_encoder *encoder,
 		dpi_enabled = I915_READ(MIPI_PORT_CTRL(port)) &
 							DPI_ENABLE;
 
-		/* Due to some hardware limitations on BYT, MIPI Port C DPI
-		 * Enable bit does not get set. To check whether DSI Port C
-		 * was enabled in BIOS, check the Pipe B enable bit
+		/*
+		 * Due to some hardware limitations on VLV/CHV, the DPI enable
+		 * bit in port C control register does not get set. As a
+		 * workaround, check pipe B conf instead.
 		 */
-		if (IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) &&
-		    (port == PORT_C))
+		if ((IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) && port == PORT_C)
 			dpi_enabled = I915_READ(PIPECONF(PIPE_B)) &
 							PIPECONF_ENABLE;
 
-- 
2.7.4