Re: [PATCH -v2 14/33] locking,m68k: Implement atomic_fetch_{add,sub,and,or,xor}()

[Peter Zijlstra]

On Thu, Jun 16, 2016 at 12:08:27PM +0200, Geert Uytterhoeven wrote:

> >  #ifdef CONFIG_RMW_INSNS
> >
> > +/*
> > + * Am I reading these CAS loops right in that %2 is the old value and the first
> > + * iteration uses an uninitialized value?
> > + *
> > + * Would it not make sense to add: tmp = atomic_read(v); to avoid this?
> > + */
> > +
> >  #define ATOMIC_OP_RETURN(op, c_op, asm_op)                             \
> >  static inline int atomic_##op##_return(int i, atomic_t *v)             \
> >  {                                                                      \
> 
> Do we want the above comment in the code?

I figured it would not hurt; is this indeed the case, do we want to fix
it? I can do a follow up patch clarifying the situation.