Re: [PATCH] ARM: sti: Implement dummy L2 cache's write_sec

[Patrice Chotard]

Hi Russell

On 06/28/2016 11:49 AM, Russell King - ARM Linux wrote:
> On Tue, Jun 28, 2016 at 11:40:37AM +0200, patrice.chotard@xxxxxx wrote:
> > From: Patrice Chotard <patrice.chotard@xxxxxx>
> >
> > This patch implements the write_sec callback that handle PL310
> > secure registers writes.
> > This callback is just a stub for now, to avoid system crash.
> > Later, it could handle SMC calls so that TZ handles the needed writes.
> Is there much point having the L2 cache DT node enabled if you have
> no support for the writes, which are required for the hardware to be
> enabled?
It's similar to what has been done for ux500 machine, in non secure 
mode, we
can't write in L2 cache secure registers.

Patrice