Re: [PATCH 1/5] mmu: mark spte present if the x bit is set

[Bandan Das]

Paolo Bonzini <pbonzini@xxxxxxxxxx> writes:

> On 28/06/2016 22:37, Bandan Das wrote:
>> Paolo Bonzini <pbonzini@xxxxxxxxxx> writes:
>> 
>>> On 28/06/2016 19:33, Bandan Das wrote:
>>>>>>>>  static int is_shadow_present_pte(u64 pte)
>>>>>>>>  {
>>>>>>>> -	return pte & PT_PRESENT_MASK && !is_mmio_spte(pte);
>>>>>>>> +	return pte & (PT_PRESENT_MASK | shadow_x_mask) &&
>>>>>>>> +		!is_mmio_spte(pte);
>>>>>>
>>>>>> This should really be pte & 7 when using EPT.  But this is okay as an
>>>>>> alternative to a new shadow_present_mask.
>>>> I could revive shadow_xonly_valid probably... Anyway, for now I will
>>>> add a TODO comment here.
>>>
>>> It's okay to it like this, because the only invalid PTEs reaching this
>>> point are those that is_mmio_spte filters away.  Hence you'll never get
>>> -W- PTEs here, and pte & 7 is really the same as how you wrote it.  It's
>>> pretty clever, and doesn't need a TODO at all. :)
>> 
>> Thanks, understood. So, the way it is written now covers all cases for
>> pte & 7. Let's still add a comment - clever things are usually
>> confusing to many!
>
> I think another way to write it is "(pte & 0xFFFFFFFFull) &&
> !is_mmio_spte(pte)", since non-present/non-MMIO SPTEs never use bits
> 1..31 (they can have non-zero bits 32..63 on 32-bit CPUs where we don't
> update the PTEs atomically).  Guangrong, what do you prefer?

Actually, I like this one better although until now, I was not sure if it's
a safe assumption for non-ept cases. From your description, it looks like
it is.

> Paolo