Re: [PATCH 0/4] [RFC][v4] Workaround for Xeon Phi PTE A/D bits erratum

From: Vlastimil Babka
Date: Wed Jul 13 2016 - 08:10:45 EST

On 07/13/2016 01:37 PM, Vlastimil Babka wrote:
> With the errata, don't you have a situation where a processor in the second
> category will write and set D despite P having been cleared (due to the
> race) and thus causing us to miss the transfer of that D to the struct
> page and essentially completely miss that the physical page is dirty ?
Seems to me like this is indeed possible, but...

Nevermind, I have read the v3 thread now, where Dave says [1] that setting the D bit due to the erratum doesn't mean that the page is really actually written to (it's not). So there shouldn't be any true dirty bit to leave behind.