Re: [PATCH] mtd: spi-nor: don't build Cadence QuadSPI on non-ARM

From: Marek Vasut
Date: Tue Jul 19 2016 - 21:57:33 EST


On 07/19/2016 10:05 PM, Brian Norris wrote:
> On Tue, Jul 19, 2016 at 08:03:00AM +0200, Stefan Roese wrote:
>> On 18.07.2016 22:20, Brian Norris wrote:
>>> Hmm, does x86 not define readsl()/writesl()? I can never tell what
>>> accessors are supposed to be "standard" across architectures.
>>>
>>> Either we need to drop the COMPILE_TEST or maybe make it (!X86 &&
>>> COMPILE_TEST).
>>
>> iowrite32_rep() etc should work for x86 as well.
>
> Looks like it might. I'm not sure the original submitter can retest
> right now (travel), so I'd probably rather just take the easy fix for
> now, and we can widen to COMPILE_TEST later if desired.

Isn't there a generic readsl() and writesl() implementation in
include/asm-generic/io.h ?

> If I could get an ack on something like this, I'll apply it soon:

This is fine, I am making a note to revisit this.

> ---8<---
> From: Brian Norris <computersforpeace@xxxxxxxxx>
> Date: Tue, 19 Jul 2016 13:02:40 -0700
> Subject: [PATCH] mtd: spi-nor: don't build Cadence QuadSPI on non-ARM
>
> This controller driver is used only on ARM but is mostly written
> portably so it can build on other arch'es. Unfortunately, at least x86
> doesn't provibe readsl()/writesl() accessors. We could possibly fix this
> issue in the future by using io{read,write}32_rep() instead, but let's
> just drop the architectures we aren't using for now.
>
> Signed-off-by: Brian Norris <computersforpeace@xxxxxxxxx>
> ---
> drivers/mtd/spi-nor/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
> index 1e6f037923d9..4a682ee0f632 100644
> --- a/drivers/mtd/spi-nor/Kconfig
> +++ b/drivers/mtd/spi-nor/Kconfig
> @@ -40,7 +40,7 @@ config SPI_ATMEL_QUADSPI
>
> config SPI_CADENCE_QUADSPI
> tristate "Cadence Quad SPI controller"
> - depends on OF && (ARM || COMPILE_TEST)
> + depends on OF && ARM
> help
> Enable support for the Cadence Quad SPI Flash controller.
>
>


--
Best regards,
Marek Vasut