Probe the system parallel flash using device tree rather than platform
code, in order to reduce the amount of the latter.
Signed-off-by: Paul Burton <paul.burton@xxxxxxxxxx>
---
arch/mips/boot/dts/mti/sead3.dts | 17 +++++++++++++++++
arch/mips/mti-sead3/sead3-platform.c | 37 ------------------------------------
2 files changed, 17 insertions(+), 37 deletions(-)
diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts
index 66f7947..7799826 100644
--- a/arch/mips/boot/dts/mti/sead3.dts
+++ b/arch/mips/boot/dts/mti/sead3.dts
@@ -67,6 +67,23 @@
interrupts = <0>; /* GIC 0 or CPU 6 */
};
+ pflash@1c000000 {
+ compatible = "intel,28f128j3", "cfi-flash";
+ reg = <0x1c000000 0x2000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ user-fs@0 {
+ label = "User FS";
+ reg = <0x0 0x1fc0000>;
+ };
+
+ board-config@3e0000 {
+ label = "Board Config";
+ reg = <0x1fc0000 0x40000>;
+ };
+ };[...]
+
/* UART connected to FTDI & miniUSB socket */
uart0: uart@1f000900 {
compatible = "ns16550a";