Re: XSA 154 and ISA region (640K -> 1MB) WB cache instead of UC

[Jan Beulich]

>>> On 19.08.16 at 16:52, <konrad.wilk@xxxxxxxxxx> wrote:
> On Thu, Aug 18, 2016 at 04:06:33AM -0600, Jan Beulich wrote:
>> >>> On 17.08.16 at 22:32, <konrad.wilk@xxxxxxxxxx> wrote:
>> >    Looking at the kernel it assumes that WB is ok for 640KB->1MB.
>> >    The comment says:
>> >    " /* Low ISA region is always mapped WB in page table. No need to track *"
>> 
>> As per above it's not clear to me what this comment is backed by.
> 
> I was hoping you would know :-)
> 
> Ah, commit 2e5d9c857d4e6c9e7b7d8c8c86a68a7842d213d6
> Author: venkatesh.pallipadi@xxxxxxxxx <venkatesh.pallipadi@xxxxxxxxx>
> Date:   Tue Mar 18 17:00:14 2008 -0700
> 
>     x86: PAT infrastructure patch
>     
>     Sets up pat_init() infrastructure.
>     
> 
> which sets the MTRR for that region.

Hmm, that's the commit which introduced pat.c years ago. I can't
see it writing an MTRRs though, nor can I see it backing the comment
in adds in any way. I guess I'm confused...

Jan