Re: [PATCH v2 6/8] pinctrl: Add pinctrl-aspeed-g4 driver

[Joel Stanley]

On Fri, Aug 19, 2016 at 10:14 PM, Andrew Jeffery <andrew@xxxxxxxx> wrote:
> A subset of the pins and functions are exposed. The selection of
> functions and pins is driven by the development of OpenBMC[1] on the
> AST2400 SoC, particularly around booting the OpenPOWER Palmetto
> development machine.

Looks good to me. I've given them a run on a few different machines.
You've addressed all of issues I had from v1.

>
> [1] https://github.com/openbmc/docs
>
> Signed-off-by: Andrew Jeffery <andrew@xxxxxxxx>

Reviewed-by: Joel Stanley <joel@xxxxxxxxx>

> ---
>
> Since v1:
>
> * Fix the RMII1 signal descriptor bit
> * Add a number of new mux function and pin definitions
> * Sort the pin, group and function arrays for sanity
> * Add SoC-specific compatible string
>
>  drivers/pinctrl/aspeed/Kconfig             |    8 +
>  drivers/pinctrl/aspeed/Makefile            |    1 +
>  drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c | 1231 ++++++++++++++++++++++++++++
>  3 files changed, 1240 insertions(+)
>  create mode 100644 drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c