RE: [PATCH v2 1/5] mmu: extend the is_present check to 32 bits
From: Li, Liang Z
Date: Thu Sep 01 2016 - 10:20:27 EST
Intel SDM doesn't describe whether the A bit will be set or not when CPU accesses a no present EPT page table entry?
even this patch works for the current CPU, it's not good to make such an assumption.
Should we revert it?
Thanks!
Liang
> -----Original Message-----
> From: kvm-owner@xxxxxxxxxxxxxxx [mailto:kvm-owner@xxxxxxxxxxxxxxx]
> On Behalf Of Bandan Das
> Sent: Wednesday, July 13, 2016 6:19 AM
> To: kvm@xxxxxxxxxxxxxxx
> Cc: pbonzini@xxxxxxxxxx; guangrong.xiao@xxxxxxxxxxxxxxx;
> kernellwp@xxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx
> Subject: [PATCH v2 1/5] mmu: extend the is_present check to 32 bits
>
> This is safe because this function is called on host controlled page table and
> non-present/non-MMIO sptes never use bits 1..31. For the EPT case, this
> ensures that cases where only the execute bit is set is marked valid.
>
> Signed-off-by: Bandan Das <bsd@xxxxxxxxxx>
> ---
> arch/x86/kvm/mmu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index
> def97b3..87b62dc 100644
> --- a/arch/x86/kvm/mmu.c
> +++ b/arch/x86/kvm/mmu.c
> @@ -304,7 +304,7 @@ static int is_nx(struct kvm_vcpu *vcpu)
>
> static int is_shadow_present_pte(u64 pte) {
> - return pte & PT_PRESENT_MASK && !is_mmio_spte(pte);
> + return (pte & 0xFFFFFFFFull) && !is_mmio_spte(pte);
> }
>
> static int is_large_pte(u64 pte)
> --
> 2.5.5
>
> --
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