Re: [PATCH 1/5] KVM: x86: avoid atomic operations on APICv vmentry

[Paolo Bonzini]

> > On Oct 14, 2016, at 11:56 AM, Paolo Bonzini <pbonzini@xxxxxxxxxx> wrote:
> >>> 
> >>> 	for (i = 0; i <= 7; i++) {
> >>> -		pir_val = xchg(&pir[i], 0);
> >>> -		if (pir_val)
> >>> +		pir_val = READ_ONCE(pir[i]);
> >> 
> >> Out of curiosity, do you really need this READ_ONCE?
> > 
> > The answer can only be "depends on the compiler's whims". :)
> > If you think of READ_ONCE as a C11 relaxed atomic load, then yes.
> 
> Hm.. So the idea is to make the code "race-freeâ in the sense
> that every concurrent memory access is done using READ_ONCE/WRITE_ONCE?
> 
> If that is the case, I think there are many other cases that need to be
> changed, for example apic->irr_pending and vcpu->arch.pv.pv_unhalted.

There is no documentation for this in the kernel tree unfortunately.
But yes, I think we should do that.  Using READ_ONCE/WRITE_ONCE around
memory barriers is a start.

Paolo