Re: [PATCH v2 03/10] pwm: imx: Rewrite imx_pwm_*_v1 code to facilitate switch to atomic pwm operation

From: Lukasz Majewski
Date: Tue Nov 01 2016 - 04:23:05 EST

Hi Sascha

> On Tue, Nov 01, 2016 at 06:57:23AM +0100, Lukasz Majewski wrote:
> > Hi Sascha,
> >
> > > The current assumption as discussed by Philipp and me is that the
> > > ipg clk is only needed when the pwm output is driven by the ipg
> > > clk (MX3_PWMCR[16:17] = MX3_PWMCR_CLKSRC_IPG)
> >
> > At least on my setup (i.MX6q) the ipg clock (ipg_clk) don't need to
> > be explicitly enabled in the ->apply() callback (in the pwm-imx.c)
> > when MX3_PWMCR_CLKSRC_IPG (0x01 - ipg_clk) is selected as the PWM
> > source.
> No. If you look in the device tree you'll see that there is no special
> gateable ipg clock for the PWM. Instead the SoC ipg clock is
> registered for the PWM which is not gateable.

I do understand that the goal is to enable ipg clock only on demand
(when we access registers) and just wanted to say that the approach with
ipg enabled in dts works on my setup (and for now is sufficient).

I suppose that ipg gating support for PWM will be provided in a separate

> Sascha

Best regards,

Åukasz Majewski

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