Re: [PATCH v3 1/2] x86/AMD: Fix cpu_llc_id for AMD Fam17h systems
From: Ingo Molnar
Date: Mon Nov 07 2016 - 02:31:29 EST
* Borislav Petkov <bp@xxxxxxx> wrote:
> Lemme clean up the commit message a bit more and add tags:
> From: Yazen Ghannam <Yazen.Ghannam@xxxxxxx>
> Date: Tue, 1 Nov 2016 11:51:02 -0500
> Subject: [PATCH] x86/AMD: Fix cpu_llc_id for AMD Fam17h systems
> cpu_llc_id (Last Level Cache ID) derivation on AMD Fam17h has an
> underflow bug when extracting the socket_id value. It starts from 0
> so subtracting 1 from it will result in an invalid value. This breaks
> scheduling topology later on since the cpu_llc_id will be incorrect.
> The APIC ID is preset in APICx020 for bits 3 and above: they contain the
> core complex, node and socket IDs.
> The LLC is at the core complex level so we can find a unique cpu_llc_id
> by right shifting the APICID by 3 because then the least significant bit
> will be the Core Complex ID.
Same question as for the previous patch: what are the effects of the bug:
- Outright bad scheduling?
- Suboptimal scheduling?
- Something else?
Such information needs to be in commit messages, _especially_ when a Cc: stable
tag is added as well.