Re: [PATCH v12 6/7] x86/arch_prctl: Add ARCH_[GET|SET]_CPUID

[Ingo Molnar]

* Thomas Gleixner <tglx@xxxxxxxxxxxxx> wrote:

> On Fri, 18 Nov 2016, Ingo Molnar wrote:
> > * Kyle Huey <me@xxxxxxxxxxxx> wrote:
> > > +	if (test_tsk_thread_flag(prev_p, TIF_NOCPUID) ^
> > > +	    test_tsk_thread_flag(next_p, TIF_NOCPUID)) {
> > > +		set_cpuid_faulting(test_tsk_thread_flag(next_p, TIF_NOCPUID));
> > > +	}
> > > +
> > 
> > Why not cache the required MSR value in the task struct instead?
> > 
> > That would allow something much more obvious and much faster, like:
> > 
> > 	if (prev_p->thread.misc_features_val != next_p->thread.misc_features_val)
> > 		wrmsrl(MSR_MISC_FEATURES_ENABLES, next_p->thread.misc_features_val);
> > 
> > (The TIF flag maintenance is still required to get into __switch_to_xtra().)
> > 
> > It would also be easy to extend without extra overhead, should any other feature 
> > bit be added to the MSR in the future.
> 
> I doubt that. There are feature enable bits coming up which are not related to 
> tasks.

Any inefficiencies resulting from such features should IMHO be carried by those 
features, not by per task features - but:

> [...] So if we have switches enabling/disabling global features, then we would 
> be forced to chase all threads in order to update all misc_features thread 
> variables. Surely not what we want to do.

What switches would those be? We generally don't twiddle global CPU features post 
bootup - we pick a model on bootup and go with that.

I'd really like to see code (prototype patches are OK - or the person doing it can 
send it to me privately as well if it's not production quality or public yet), or 
some careful description of the features involved.

Thanks,

	Ingo