Hi Nicholas,Data sheet for this device [1] says STBYN deassertion to RSTN deassertion should be >50us, though this is actually referenced to MCLK startup. See Figure 36, Power-Up Sequence, page 42.
On Tue, Dec 13, 2016 at 02:58:02AM +0100, Nicholas Mc Guire wrote:
As this is not in atomic context and it does not seem like a criticalI'd suggest not to. These delays are often directly visible to the user in
timing setting a range of 1ms allows the timer subsystem to optimize
the hrtimer here.
use cases where attention is indeed paid to milliseconds.
The same applies to register accesses. An delay of 0 to 100 µs isn't much as
such, but when you multiply that with the number of accesses it begins to
add up.