Re: [PATCH RFT] usb: dwc2: gadget: Fix fifo size configuration

From: Sevak Arakelyan
Date: Tue Dec 20 2016 - 07:57:38 EST


On 12/19/2016 8:39 PM, Stefan Wahren wrote:
> Currently the upper limit for the endpoint index during fifo size
> config was always 16 instead of the available endpoints. So fix this
> by using the determined amount of endpoints and avoid a warning about
> "insufficient fifo memory" on bcm2835 which has only 8 endpoints.
>
> Signed-off-by: Stefan Wahren <stefan.wahren@xxxxxxxx>
> Fixes: 0a176279db68 ("usb: dwc2: gadget: configure fifos from device tree")
> ---
> drivers/usb/dwc2/gadget.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Since revert of ("usb: dwc2: gadget: fix TX FIFO size and address") which
> caused regressions on some platforms this is the second attempt to fix
> gadget support for bcm2835.
>
> diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
> index b95930f..b00184c 100644
> --- a/drivers/usb/dwc2/gadget.c
> +++ b/drivers/usb/dwc2/gadget.c
> @@ -228,7 +228,7 @@ static void dwc2_hsotg_init_fifo(struct dwc2_hsotg *hsotg)
> * them to endpoints dynamically according to maxpacket size value of
> * given endpoint.
> */
> - for (ep = 1; ep < MAX_EPS_CHANNELS; ep++) {
> + for (ep = 1; ep < hsotg->num_of_eps; ep++) {
> if (!txfsz[ep])
> continue;
> val = addr;

Hi Stefan,

This patch is only temporary, not full solution for bcm2835 and in
the loop you need to use hsotg->num_of_eps in shared FIFO mode and the
number of device IN EPs which is in GHWCFG4 with mask
GHWCFG4_NUM_IN_EPS_MASK in dedicated FIFO mode.

The upper limit is up to 15 but the actual number of FIFOa are being
configured according to the given legacy array
DWC2_G_P_LEGACY_TX_FIFO_SIZE {256, 256, 256, 256, 768, 768, 768, 768, 0,
0, 0, 0, 0, 0, 0}, in that case it is 8 FIFOs. The legacy values are the
main issue. We must do correct calculation according to FIFO operation
mode, device operation mode, take into consideration the EP Info Block
which must be at the end of total FIFO and after that configure correct
number of FIFOs with correct size of depth on every setup. We prepared a
patch series to fix that issue and it is under internal review and
testing process and will be submitted soon.

Thanks,
Sevak