Re: [PATCH v4 3/4] sparc64: Add support for ADI register fields, ASIs and traps
From: David Miller
Date: Mon Jan 16 2017 - 23:24:40 EST
From: Khalid Aziz <khalid.aziz@xxxxxxxxxx>
Date: Wed, 11 Jan 2017 09:12:53 -0700
> +#define SUN4V_MCD_PRECISE \
> + ldxa [%g0] ASI_SCRATCHPAD, %g2; \
> + ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \
> + ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \
> + ba,pt %xcc, etrap; \
> + rd %pc, %g7; \
> + ba,pt %xcc, sun4v_mcd_detect_precise; \
> + nop; \
> + nop;
Always indent instructions which sit in the delay slot of a non-annulled
branch, call, or jmpl by one extra space. For example:
ba,pt %xcc, 1f
nop
> +sun4v_mcd_detect_precise:
> + or %l4, %g0, %o1
> + or %l5, %g0, %o2
> + call sun4v_mem_corrupt_detect_precise
> + add %sp, PTREGS_OFF, %o0
Likewise.
Also, just do a normal "mov x, y" instead of the "or x, %g0, y" thing.