RE: [RFC 2/4] irqchip, gicv3-its:Workaround for HiSilicon erratum 161010801

From: Shameerali Kolothum Thodi
Date: Wed Jan 25 2017 - 05:30:46 EST

> -----Original Message-----
> From: Mark Rutland [mailto:mark.rutland@xxxxxxx]
> Sent: Tuesday, January 24, 2017 2:15 PM
> To: Shameerali Kolothum Thodi
> Cc: marc.zyngier@xxxxxxx; will.deacon@xxxxxxx; linux-arm-
> kernel@xxxxxxxxxxxxxxxxxxx; Linuxarm; linux-kernel@xxxxxxxxxxxxxxx;
> devicetree@xxxxxxxxxxxxxxx; John Garry; Guohanjun (Hanjun Guo);
> robin.murphy@xxxxxxx
> Subject: Re: [RFC 2/4] irqchip, gicv3-its:Workaround for HiSilicon
> erratum 161010801
sounds like this will have severe implications for virtualization.
> > Also these platforms doesn't have a proper IIDR
> > register to use the existing IIDR based quirk mechanism.
> What exactly is wrong with the IIDR on these platforms? That sounds
> like
> an erratum as of itself.
> What precise value do reads of the IIDR return? Or do reads result in
> other erroneous behaviour?

As far as I know, there is no erroneous behavior while reading. But the
IIDR JEP106 identity code is 0 on these platforms, hence not much of use.

This will be corrected in next revision of hw.