Re: [PATCH v3 fpga 4/4] fpga zynq: Use the scatterlist interface

From: Moritz Fischer
Date: Sat Jan 28 2017 - 05:35:13 EST

Hi Jason,

On Fri, Jan 6, 2017 at 10:14 PM, Jason Gunthorpe
<jgunthorpe@xxxxxxxxxxxxxxxxxxxx> wrote:
> This allows the driver to avoid a high order coherent DMA allocation
> and memory copy. With this patch it can DMA directly from the kernel
> pages that the bitfile is stored in.
> Since this is now a gather DMA operation the driver uses the ISR
> to feed the chips DMA queue with each entry from the SGL.
> Signed-off-by: Jason Gunthorpe <jgunthorpe@xxxxxxxxxxxxxxxxxxxx>
Acked-by: Moritz Fischer <moritz.fischer@xxxxxxxxx>